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MAX14824GTG+

IO-Link Master Transceiver

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:Maxim(美信半导体)

厂商官网:https://www.maximintegrated.com/en.html

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
包装说明
QCCN, LCC24,.16SQ,20
Reach Compliance Code
compli
ECCN代码
EAR99
Factory Lead Time
18 weeks
差分输出
NO
驱动器位数
1
接口集成电路类型
LINE TRANSCEIVER
JESD-30 代码
S-PQCC-N24
JESD-609代码
e3
湿度敏感等级
1
端子数量
24
最高工作温度
105 °C
最低工作温度
-40 °C
最大输出低电流
0.005 A
封装主体材料
PLASTIC/EPOXY
封装代码
QCCN
封装等效代码
LCC24,.16SQ,20
封装形状
SQUARE
封装形式
CHIP CARRIER
电源
2.5/5,18/36 V
认证状态
Not Qualified
最大接收延迟
最大压摆率
2.5 mA
表面贴装
YES
技术
BICMOS
温度等级
INDUSTRIAL
端子面层
Matte Tin (Sn)
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
QUAD
Base Number Matches
1
文档预览
19-5788; Rev 3; 5/12
EVALUATION KIT AVAILABLE
MAX14824
IO-Link Master Transceiver
General Description
The MAX14824 is an IO-Link
M
master interface that inte-
grates an IO-Link physical layer transceiver with an
auxiliary digital input and two linear regulators. High port
count IO-Link master applications are supported through
in-band SPI addressing, and the 12MHz SPI interface
minimizes host controller access times. In-band address-
ing and selectable SPI addresses enable cascading up
to 16 devices.
The device supports all the IO-Link data rates and fea-
tures slew-rate-controlled drivers to reduce EMI. The
driver is guaranteed to drive up to 300mA (min) load
currents. Internal wake-up circuitry automatically deter-
mines the correct wake-up polarity, allowing for the use
of simple UARTs for wake-up pulse generation.
The MAX14824 is available in a 4mm x 4mm, 24-pin
TQFN package with exposed pad, and operates over the
extended -40NC to +105NC temperature range.
Features
S
IO-Link v.1.0 and v.1.1 Physical Layer Compliant
S
Supports COM1, COM2, and COM3 Data Rates
S
Push-Pull, High-Side, or Low-Side Outputs
S
300mA C/Q Output Drive
S
1µF C/Q Load Drive Capability
S
Generates 500mA Wake-Up Pulse
S
Automatic Wake-Up Pulse Polarity
S
Auxiliary Digital Input
S
5V and 3.3V Linear Regulators
S
SPI Interface for Configuration and Monitoring
S
SPI-Based Chip Addressing
S
EMI Emission Control Through Slew-Controlled
Driver
S
Reverse-Polarity Protection on DI
S
Short-Circuit Protection on C/Q
S
High Temperature Warning and Thermal Shutdown
S
Extensive Fault Monitoring and Reporting
S
-40NC to +105NC Operating Temperature Range
S
4mm x 4mm TQFN Package
Applications
IO-Link Master Controllers
PLC Fieldbus Gateways
High Port Count IO-Link Masters
24V Digital Inputs and Outputs
Ordering Information
appears at end of data sheet.
Typical Operating Circuits
24V
1 F
0.1 F
1 F
270pF
V
CC
SPI
GPO
RX
TX
RTS
WUEN
RX
TXC
TXEN
V
L
TXQ LDO33
V
5
LDOIN V
CC
C/Q
C/Q
IO-LINK
CONTROLLER
270pF
MAX14824
DI
GND
A0
A1
A2
A3
GND
Typical Operating Circuits continued at end of data sheet.
IO-Link is a registered trademark of Profibus User Organization (PNO).
For related parts and recommended products to use with this part, refer to:
www.maxim-ic.com/MAX14824.related
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX14824
IO-Link Master Transceiver
Functional Diagram
LDO33
UV
UV MONITOR
3.3V LDO
5V LDO
V
5
LDOIN
V
L
CS
SDI
SDO
SCLK
IRQ
A3:A0
RX
WU POLARITY
GENERATOR
DRIVER
V
CC
STATUS
AND
CONFIGURATION
FILTER
SHORT-CIRCUIT
PROTECTION
C/Q
LOAD
C/Q
WUEN
TXQ
TXC
TXEN
LI
GND
REVERSE
POLARITY
PROTECTION
DI
LOAD
DI
MAX14824
2
MAX14824
IO-Link Master Transceiver
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise specified.)
V
CC
........................................................................-0.3V to +40V
LDOIN....................................................................-0.3V to +40V
V
5
.......................0.3V to the lesser of (V
LDOIN
+ 0.3V) and +6V
LDO33 .................... -0.3V to the lesser of (V
5
+ 0.3V) and +6V
V
L
.............................................................................-0.3V to +6V
DI ............................................................................-40V to +40V
C/Q ........................................................... -0.3V to (V
CC
+ 0.3V)
Logic Inputs
TXC, TXQ, TXEN, A2,
CS,
SDI, SCLK, WUEN .. -0.3V to (V
L
+ 0.3V)
A3, A1, A0 ...........................................................-0.3V to +6V
Logic Outputs
RX, LI, SDO,
IRQ
..................................... -0.3V to (V
L
+ 0.3V)
UV ........................................................................-0.3V to +6V
Continuous Current Into Any Logic Pin ..........................
Q50mA
Continuous Power Dissipation
TQFN (derate 27.8mW/NC above +70NC)..................2222mW
Operating Temperature Range ........................ -40NC to +105NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (B
JA
) ..........36NC/W
Junction-to-Case Thermal Resistance (B
JC
) .................3NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 18V to 36V, V
L
= 2.3V to 5.5V, V
GND
= 0V; all logic inputs at V
L
or GND; T
A
= -40NC to +105NC, unless otherwise noted. Typical
values are at V
CC
= 24V, V
L
= 3.3V, and T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
V
CC
Supply Voltage
V
CC
Supply Current
V
CC
Undervoltage Lockout
Threshold
V
CC
Undervoltage Lockout
Threshold Hysteresis
V
5
Supply Current
V
5
Undervoltage Lockout
Threshold
V
L
Logic-Level Supply Voltage
V
L
Logic-Level Supply Current
V
L
Undervoltage Threshold
5V LDO (V
5
)
LDOIN Input Voltage Range
V
LDOIN
7
36
V
SYMBOL
V
CC
I
CC
V
CCUVLO
V
CCUVLO_HYST
I
5_IN
V
5UVLO
V
L
I
L
V
LUVLO
All logic inputs at V
L
or GND
V
L
falling
0.65
0.95
LDOIN shorted to V
5
, external 5V applied
to V
5
, no switching, LDO33 disabled
V
5
falling
2.3
CONDITIONS
For driver operation
V
CC
= 24V, C/Q as input, no load on V
5
or LDO33, LDOIN not connected to V
CC
,
V
LDOIN
= 24V
V
CC
falling
6
MIN
9
1.3
TYP
MAX
36
2.5
UNITS
V
mA
7.5
200
3
2.4
9
V
mV
mA
V
5.5
5
1.3
V
FA
V
3
MAX14824
IO-Link Master Transceiver
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 18V to 36V, V
L
= 2.3V to 5.5V, V
GND
= 0V; all logic inputs at V
L
or GND; T
A
= -40NC to +105NC, unless otherwise noted. Typical
values are at V
CC
= 24V, V
L
= 3.3V, and T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
LDOIN Supply Current
V
5
Output Voltage Range
V
5
Load Regulation
3.3V LDO (LDO33)
LDO33 Output Voltage
LDO33 Undervoltage Lockout
Threshold
LDO33 Load Regulation
24V INTERFACE
C/Q Output Resistance High
C/Q Output Resistance Low
C/Q Source Current Limit
C/Q Sink Current Limit
C/Q Input Threshold High
C/Q Input Threshold Low
C/Q Input Hysteresis
DI Input Threshold High
DI Input Threshold Low
DI Input Hysteresis
C/Q Weak Pulldown Current
DI Weak Pulldown Current
C/Q Input Capacitance
DI Input Capacitance
C/Q, DI INPUT LOAD
C/Q Load Current
DI Load Current
I
LLM_C/Q
I
LLM_DI
C/Q load enabled
(C/QLoad = 1)
DI load enabled
(DiLoad = 1)
0
P
V
C/Q
P
5V
9V
P
V
C/Q
0
P
V
DI
P
5V
9V
P
V
DI
0
5
0
2
3.5
6.8
8.1
8.1
4.3
4.3
mA
mA
R
OH_C/Q
R
OL_C/Q
I
OH_C/Q
I
OL_C/Q
V
IH_C/Q
V
IL_C/Q
V
HYS_C/Q
V
IH_DI
V
IL_DI
V
HYS_DI
I
PDC/Q
I
PDDI
C
C/Q
C
DI
C/Q driver disabled, V
C/Q
= V
CC
DI load disabled, V
DI
= V
CC
C/Q driver disabled
C/Q high-side enabled, I
C/Q
= -200mA,
9V
P
V
CC
P
36V (Note 5)
C/Q low-side enabled, I
C/Q
= +200mA,
9V
P
V
CC
P
36V (Note 5)
C/Q high-side enabled, V
C/Q
< (V
CC
-
3V), 9V
P
V
CC
P
36V
C/Q low-side enabled, V
C/Q
> 3V, 9V
P
V
CC
P
36V
C/Q driver disabled
C/Q driver disabled
C/Q driver disabled
10.5
8.0
1.0
6.8
5.2
1
100
50
40
20
400
300
8
6.4
+500
1.8
2.0
+670
-660
-500
13.0
11.5
2.9
3.6
I
I
mA
mA
V
V
V
V
V
V
FA
FA
pF
pF
V
LDO33
V
LDO33UVLO
No load on LDO33
V
LDO33
falling
1mA < I
LOAD
< 10mA, V
LDOIN
= 7V
3.1
2.4
0.25
3.5
V
V
%
SYMBOL
I
LDOIN
V
5
CONDITIONS
V
LDOIN
= 24V, C/Q as input, no load on
V
5
or LDO33
No load on V
5
, 7V
P
V
LDOIN
P
36V
1mA < I
LOAD
< 10mA, V
LDOIN
= 7V,
0.1FF bypass capacitor on V
5
4.75
MIN
TYP
3.0
5.00
0.08
MAX
5
5.25
UNITS
mA
V
%
4
MAX14824
IO-Link Master Transceiver
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 18V to 36V, V
L
= 2.3V to 5.5V, V
GND
= 0V; all logic inputs at V
L
or GND; T
A
= -40°C to +105°C, unless otherwise noted. Typical
values are at V
CC
= 24V, V
L
= 3.3V, and T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
0.3 x
V
L
0.7 x
V
L
Logic input = GND or V
L
-1
5
325
I
OUT
= -5mA
V
L
-
0.6
-1
+115
20
+150
20
+1
800
0.4
+1
TYP
MAX
UNITS
LOGIC INPUTS (TXC, TXQ, TXEN,
CS,
WUEN, SDI, SCLK, A3, A2, A1, A0)
Logic Input-Voltage Low
Logic Input-Voltage High
Logic Input Leakage Current
Logic Input Capacitance
A1 Pulldown Resistance
Logic Output-Voltage Low
V
IL
V
IH
I
LEAK
C
IN
R
A1PD
V
OL
V
V
FA
pF
kI
V
LOGIC OUTPUTS (RX, LI, UV, SDO,
IRQ)
V
OHRX
,
V
OHWU
, V
OHLI
,
I
OUT
= 5mA (Note 3)
V
OHSDO
,
V
OHIRQ
,
I
LK_SDO
SDO disabled, SDO = GND or V
L
Die temperature rising, OTemp bit is set
Die temperature falling, OTemp bit is
cleared
Die temperature rising
Logic Output-Voltage High
V
SDO Leakage Current
THERMAL SHUTDOWN
Thermal Warning Threshold
Thermal Warning Threshold
Hysteresis
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
FA
NC
NC
NC
NC
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 18V to 36V, V
L
= 2.3V to 5.5V, V
GND
= 0V; all logic inputs at V
L
or GND; T
A
= -40
°
C to +105
°
C, unless otherwise noted. Typical
values are at V
CC
= 24V, V
L
= 3.3V, and T
A
= +25
o
C, unless otherwise noted.) (Note 2)
PARAMETER
C/Q, DI INTERFACES
Data Rate
DRIVER (C/Q)
Driver Low-to-High Propagation
Delay
Driver High-to-Low Propagation
Delay
t
PDLH
Push-pull or high-side
(PNP) configuration,
Figure 1
Push-pull or low-side
(NPN) configuration,
Figure 1
HiSlew = 1
HiSlew = 0
HiSlew = 1
HiSlew = 0
0.5
1.6
0.5
1.6
2
5
2
5
Fs
Fs
DR
HiSlew = 1
HiSlew = 0
4.8
4.8
230.4
38.4
kbps
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
t
PDHL
5
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参数对比
与MAX14824GTG+相近的元器件有:MAX14824。描述及对比如下:
型号 MAX14824GTG+ MAX14824
描述 IO-Link Master Transceiver IO-Link Master Transceiver
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