Spansion
®
Analog and Microcontroller
Products
The following document contains information on Spansion analog and microcontroller products. Although the
document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion
will continue to offer these products to new and existing customers.
Continuity of Specifications
There is no change to this document as a result of offering the device as a Spansion product. Any changes that
have been made are the result of normal document improvements and are noted in the document revision
summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a
revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “MB”. To order these products, please use
only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory, analog, and
microcontroller products and solutions.
FUJITSU SEMICONDUCTOR
DATA SHEET
DS702–00009–3v0-E
8-bit Microcontrollers
New 8FX MB95630H Series
MB95F632H/F632K/F633H/F633K/F634H/F634K/F636H/F636K
■
DESCRIPTION
The MB95630H Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact
instruction set, the microcontrollers of this series contain a variety of peripheral functions.
■
FEATURES
• F
2
MC-8FX CPU core
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
Note: F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
• Clock
• Selectable main clock source
- Main oscillation clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz)
- External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz)
- Main CR clock (4 MHz
±2%)
- Main CR PLL clock
- The main CR PLL clock frequency becomes 8 MHz
±2%
when the PLL multiplication rate is 2.
- The main CR PLL clock frequency becomes 10 MHz
±2%
when the PLL multiplication rate is 2.5.
- The main CR PLL clock frequency becomes 12 MHz
±2%
when the PLL multiplication rate is 3.
- The main CR PLL clock frequency becomes 16 MHz
±2%
when the PLL multiplication rate is 4.
• Selectable subclock source
- Suboscillation clock (32.768 kHz)
- External clock (32.768 kHz)
- Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
• Timer
• 8/16-bit composite timer
×
2 channels
• 8/16-bit PPG
×
3 channels
• 16-bit PPG timer
×
1 channel (can work independently or together with the multi-pulse generator)
• 16-bit reload timer
×
1 channel (can work independently or together with the multi-pulse generator)
• Time-base timer
×
1 channel
• Watch prescaler
×
1 channel
(Continued)
For the information for microcontroller supports, see the following website.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2011-2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2013.6
MB95630H Series
(Continued)
• UART/SIO
×
1 channel
• Full duplex double buffer
• Capable of clock asynchronous (UART) serial data transfer and clock synchronous (SIO) serial data trans-
fer
2
C bus interface
×
1 channel
• I
Built-in wake-up function
• Multi-pulse generator (MPG) (for DC motor control)
×
1 channel
• 16-bit reload timer
×
1 channel
• 16-bit PPG timer
×
1 channel
• Waveform sequencer (including a 16-bit timer equipped with a buffer and a compare clear function)
• LIN-UART
• Full duplex double buffer
• Capable of clock asynchronous serial data transfer and clock synchronous serial data transfer
• External interrupt
×
10 channels
• Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
• Can be used to wake up the device from different low power consumption (standby) modes
• 8/10-bit A/D converter
×
8 channels
• 8-bit or 10-bit resolution can be selected.
• Low power consumption (standby) modes
There are four standby modes as follows:
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
In standby mode, two further options can be selected: normal standby mode and deep standby mode.
• I/O port
• MB95F632H/F633H/F634H/F636H (number of I/O ports: 28)
- General-purpose I/O ports (CMOS I/O)
: 25
- General-purpose I/O ports (N-ch open drain)
:3
• MB95F632K/F633K/F634K/F636K (number of I/O ports: 29)
- General-purpose I/O ports (CMOS I/O)
: 25
- General-purpose I/O ports (N-ch open drain)
:4
• On-chip debug
• 1-wire serial control
• Serial writing supported (asynchronous mode)
• Hardware/software watchdog timer
• Built-in hardware watchdog timer
• Built-in software watchdog timer
• Power-on reset
A power-on reset is generated when the power is switched on.
• Low-voltage detection reset circuit (only available on MB95F632K/F633K/F634K/F636K)
Built-in low-voltage detection function (The combination of detection voltage and release voltage can be se-
lected from four options.)
• Comparator
• Clock supervisor counter
Built-in clock supervisor counter
• Dual operation Flash memory
The program/erase operation and the read operation can be executed in different banks (upper bank/lower
bank) simultaneously.
• Flash memory security function
Protects the content of the Flash memory.
2
DS702–00009–3v0-E
MB95630H Series
■
PRODUCT LINE-UP
Part number
MB95F632H MB95F633H MB95F634H MB95F636H MB95F632K MB95F633K MB95F634K MB95F636K
Parameter
Type
Clock
supervisor
counter
Flash memory
capacity
RAM capacity
Power-on reset
Low-voltage
detection reset
Reset input
•
•
•
CPU functions
•
•
•
General-
purpose I/O
No
Dedicated
Flash memory product
It supervises the main clock oscillation and the subclock oscillation.
8 Kbyte
12 Kbyte
20 Kbyte
36 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
36 Kbyte
256 bytes 512 bytes 1024 bytes 1024 bytes 256 bytes 512 bytes 1024 bytes 1024 bytes
Yes
Yes
Selected through software
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (machine clock frequency = 16.25 MHz)
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O port
• CMOS I/O
• N-ch open drain
: 29
: 25
:4
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
: 28
: 25
:3
• I/O port
• CMOS I/O
• N-ch open drain
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
• Reset generation cycle
software
Main oscillation clock at 10 MHz: 105 ms (Min)
watchdog timer • The sub-CR clock can be used as the source clock of the software watchdog timer.
Wild register
It can be used to replace 3 bytes of data.
• A wide range of communication speed can be selected by a dedicated reload timer.
• It has a full duplex double buffer.
• Both clock synchronous serial data transfer and clock asynchronous serial data transfer are
enabled.
• The LIN function can be used as a LIN master or a LIN slave.
8 channels
8-bit or 10-bit resolution can be selected.
2 channels
• The timer can be configured as an “8-bit timer × 2 channels” or a “16-bit timer × 1 channel”.
8/16-bit
• It has the following functions: interval timer function, PWC function, PWM function and input
composite timer capture function.
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
External
interrupt
On-chip debug
10 channels
• Interrupt by edge detection (The rising edge, falling edge, and both edges can be selected.)
• It can be used to wake up the device from different standby modes.
• 1-wire serial control
• It supports serial writing (asynchronous mode).
(Continued)
LIN-UART
8/10-bit
A/D converter
DS702–00009–3v0-E
3
MB95630H Series
Part number
MB95F632H MB95F633H MB95F634H MB95F636H MB95F632K MB95F633K MB95F634K MB95F636K
Parameter
1 channel
• Data transfer with UART/SIO is enabled.
• It has a full duplex double buffer, variable data length (5/6/7/8 bits), an internal baud rate
generator and an error detection function.
• It uses the NRZ type transfer format.
• LSB-first data transfer and MSB-first data transfer are available to use.
• Both clock asynchronous (UART) serial data transfer and clock synchronous (SIO) serial
data transfer are enabled.
1 channel
I
2
C bus
interface
• Master/slave transmission and reception
• It has the following functions: bus error function, arbitration function, transfer direction de-
tection function, wake-up function, and functions of generating and detecting repeated
START conditions.
3 channels
8/16-bit PPG
• Each channel can be used as an “8-bit timer
×
2 channels” or a “16-bit timer
×
1 channel”.
• The counter operating clock can be selected from eight clock sources.
1 channel
16-bit PPG
timer
•
•
•
•
•
•
•
•
•
•
•
•
•
PWM mode and one-shot mode are available to use.
The counter operating clock can be selected from eight clock sources.
It supports external trigger start.
It can work independently or together with the multi-pulse generator.
Two clock modes and two counter operating modes are available to use.
It can output square wave.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
Two counter operating modes: reload mode and one-shot mode
It can work independently or together with the multi-pulse generator.
16-bit PPG timer: 1 channel
16-bit reload timer operations: toggle output, one-shot output
Event counter: 1 channel
Waveform sequencer (including a 16-bit timer equipped with a buffer and a compare clear
function)
UART/SIO
1 channel
16-bit reload
timer
Multi-pulse
generator (for
DC motor
control)
Watch prescaler Eight different time intervals can be selected.
Comparator
1 channel
• It supports automatic programming (Embedded Algorithm), and program/erase/erase-
suspend/erase-resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
• Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
(Continued)
Flash memory
4
DS702–00009–3v0-E
