Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS
(V
EE
=
−5.2
V
±5%)
(Note 1)
0°
Symbol
I
E
I
inH
Characteristic
Power Supply Current
Input Current High
Pins 6, 11
Pins 7, 9, 10
Pins 4, 5, 12, 13
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Min
−
−
−
−
0.5
−1.02
−1.95
−1.17
−1.95
Max
38
468
545
434
−
−0.84
−1.63
−0.84
−1.48
Min
−
−
−
−
0.5
−0.98
−1.95
−1.13
−1.95
25°
Max
35
275
320
255
−
−0.81
−1.63
−0.81
−1.48
Min
−
−
−
−
0.3
−0.92
−1.95
−1.07
−1.95
75°
Max
38
275
320
255
−
−0.735
−1.60
−0.735
−1.45
mA
Vdc
Vdc
Vdc
Vdc
Unit
mA
mA
I
inL
V
OH
V
OL
V
IH
V
IL
1. Each MECL 10H™ series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50
W
resistor to
−2.0
V.
Table 3. AC PARAMETERS
0°
Symbol
t
pd
Characteristic
Propagation Delay
Data
Set, Reset
Clock, CE
Rise Time
Fall Time
Set−up Time
Hold Time
Min
0.4
0.6
0.5
0.5
0.5
2.2
0.7
Max
1.6
1.7
1.6
1.6
1.6
−
−
Min
0.4
0.7
0.5
0.5
0.5
2.2
0.7
25°
Max
1.7
1.8
1.7
1.7
1.7
−
−
Min
0.4
0.8
0.6
0.5
0.5
2.2
0.7
75°
Max
1.8
1.9
1.8
1.8
1.8
−
−
ns
ns
ns
ns
Unit
ns
t
r
t
f
t
set
t
hold
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
http://onsemi.com
2
MC10H130
APPLICATION INFORMATION
The MC10H130 is a clocked dual D type latch. Each latch
may be clocked separately by holding the common
clock in the low state, and using the clock enable inputs for
the clocking function. If the common clock is to be used to
clock the latch, the clock enable (CE) inputs must be in the
low state. In this mode, the enable inputs perform the
function of controlling the common clock (C).
Any change at the D input will be reflected at the output
while the clock is low. The outputs are latched on the
ORDERING INFORMATION
Device
MC10H130FN
MC10H130FNG
MC10H130FNR2
MC10H130FNR2G
MC10H130L
MC10H130P
MC10H130PG
Package
PLLC−20
PLLC−20
(Pb−Free)
PLLC−20
PLLC−20
(Pb−Free)
CDIP−16
PDIP−16
PDIP−16
(Pb−Free)
Shipping
†
46 Units / Rail
46 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
25 Unit / Rail
25 Unit / Rail
25 Unit / Rail
positive transition of the clock. While the clock is in the high
state, a change in the information present at the data inputs
will not affect the output information.
The set and reset inputs do not override the clock and D
inputs. They are effective only when either C or CE or both
are high.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
3
MC10H130
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE E
B
−N−
Y BRK
D
−L−
−M−
W
D
V
0.010 (0.250)
T L−M
N
Z
0.007 (0.180)
M
T L−M
U
S
N
S
S
0.007 (0.180)
M
T L−M
N
S
20
1
X
VIEW D−D
G1
S
S
S
A
Z
R
0.007 (0.180)
M
T L−M
0.007 (0.180)
M
T L−M
S
N
N
S
S
S
H
K1
0.007 (0.180)
M
T L−M
S
N
S
C
E
G
G1
0.010 (0.250)
S
T L−M
0.004 (0.100)
J
−T−
VIEW S
S
SEATING
PLANE
K
F
VIEW S
0.007 (0.180)
M
T L−M
S
N
S
N
S
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS
−L−, −M−,
AND
−N−
DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM
−T−,
SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
−−−
0.020
2
_
10
_
0.310
0.330
0.040
−−−
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2
_
10
_
7.88
8.38
1.02
−−−
http://onsemi.com
4
MC10H130
PACKAGE DIMENSIONS
CDIP−16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620A−01
ISSUE O
A
16
9
B
A
M
L
B
1
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
5 THIS DRAWING REPLACES OBSOLETE
CASE OUTLINE 620−10.
DIM
A
B
C
D
E
F
G
H
K
L
M
N
INCHES
MIN
MAX
0.750
0.785
0.240
0.295
−−− 0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0
_
15
_
0.020
0.040
MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49
−−−
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0
_
15
_
0.51
1.01
16X
J
E
F
C
K
T
N
G
16X
0.25 (0.010)
M
T B
SEATING
PLANE
D
0.25 (0.010)
M
T A
−A−
16
9
B
1
8
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0
_
10
_
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0
_
10
_
0.51
1.01
F
S
C
L
−T−
H
K
G
D
16 PL
SEATING
PLANE
J
T A
M
M
0.25 (0.010)
M
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support:
800−282−9855 Toll Free
Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone:
480−829−7710 or 800−344−3860 Toll Free USA/Canada
Japan:
ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
