MC74VHCT157A
Quad 2-Channel Multiplexer
The MC74VHCT157A is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT157A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V
CC
= 0 V. These
input and output structures help prevent device destruction caused by
supply voltage−input/output voltage mismatch, battery backup, hot
insertion, etc.
The inputs tolerate voltages up to 7.0 V, allowing the interface of
5.0 V systems to 3.0 V systems.
Features
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MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
1
VHCT157AG
AWLYWW
16
TSSOP−16
DT SUFFIX
CASE 948F
1
1
16
SOEIAJ−16
M SUFFIX
CASE 966
1
1
74VHCT157
ALYWG
VHCT
157A
ALYWG
G
•
•
•
•
•
•
•
•
•
•
High Speed: t
PD
= 4.1 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25°C
TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
Chip Complexity: 82 FETs or 20 Equivalent Gates
•
These Devices are Pb−Free and are RoHS Compliant
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
E
H
L
L
S
X
L
H
Outputs
Y0
−
Y3
L
A0
−A3
B0
−B3
A0
−
A3, B0
−
B3 = the levels of
the respective Data−Word Inputs.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
May, 2011
−
Rev. 3
1
Publication Order Number:
MC74VHCT157A/D
MC74VHCT157A
S
A0
B0
Y0
A1
B1
Y1
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
E
A3
B3
Y3
A2
B2
Y2
Figure 1. Pin Assignment
2
A0
B0
A1
B1
NIBBLE
INPUTS
A2
B2
A3
B3
E
S
10
14
13
15
1
12 Y3
9 Y2
3
5
6
11
7
Y1
DATA
OUTPUTS
4
Y0
Figure 2. Expanded Logic Diagram
E
S
A0
B0
A1
B1
A2
B2
A3
B3
15
1
2
3
5
6
11
10
14
13
EN
G1
1
1
MUX
4
7
9
12
Y0
Y1
Y2
Y3
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications
of any voltage higher than maximum rated
voltages to this high−impedance circuit. For
proper operation, V
in
and V
out
should be
constrained to the range GND
v
(V
in
or V
out
)
v
V
CC
.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either
GND or V
CC
). Unused outputs must be left
open.
Figure 3. IEC Logic Symbol
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2
MC74VHCT157A
MAXIMUM RATINGS
(Note 1)
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
STG
V
ESD
Positive DC Supply Voltage
Digital Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air
Storage Temperature Range
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above V
CC
and Below GND at 125°C (Note 5)
SOIC Package
TSSOP
SOIC Package
TSSOP
Output in 3−State
High or Low State
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to +7.0
−0.5
to V
CC
+0.5
−20
$20
$25
$75
200
180
−65
to +150
>2000
>200
>2000
$300
143
164
Unit
V
V
V
mA
mA
mA
mA
mW
°C
V
I
LATCHUP
q
JA
Latchup Performance
mA
°C/W
Thermal Resistance, Junction−to−Ambient
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22−A114−A
3. Tested to EIA/JESD22−A115−A
4. Tested to JESD22−C101−A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range, all Package Types
Input Rise or Fall Time
V
CC
= 5.0 V + 0.5 V
Output in 3−State
High or Low State
Characteristics
Min
4.5
0
0
−55
0
Max
5.5
5.5
V
CC
125
20
Unit
V
V
V
°C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO
0.1% BOND FAILURES
NORMALIZED FAILURE RATE
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130
°
C
TJ = 120
°
C
TJ = 100
°
C
TJ = 110
°
C
TJ = 80
°
C
100
TIME, YEARS
TJ = 90
°
C
1
1
10
1000
Figure 4. Failure Rate vs. Time Junction Temperature
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3
MC74VHCT157A
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum High−Level Input
Voltage
Maximum Low−Level Input
Voltage
Maximum High−Level Output
Voltage
V
IN
= V
IH
or V
IL
I
OH
=
−50
mA
V
IN
= V
IH
or V
IL
I
OH
=
−8
mA
V
OL
Maximum Low−Level Output
Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OH
= 8 mA
I
IN
I
CC
I
CCT
Input Leakage Current
Maximum Quiescent Supply
Current
Additional Quiescent Supply
Current (per Pin)
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
Any one input:
V
IN
= 3.4 V
All other inputs:
V
IN
= V
CC
or GND
V
OUT
= 5.5 V
Condition
(V)
4.5 to
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
0 to 5.5
5.5
5.5
4.4
3.94
0.0
0.1
0.36
±0.1
4.0
1.35
4.5
Min
2
0.8
T
A
= 25°C
Typ
Max
T
A
≤
85°C
Min
2
Max
0.8
0.8
−55°C
≤
T
A
≤
125°C
Min
2
0.8
Max
Unit
V
V
V
4.4
3.8
0.1
0.44
±1.0
40.0
1.5
4.4
3.66
0.1
0.52
±1.0
40.0
1.5
V
mA
mA
mA
I
OPD
Output Leakage Current
0
0.5
5
5
mA
ÎÎ Î Î ÎÎ Î Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î Î
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î Î
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î ÎÎ Î Î Î
Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎ Î Î ÎÎ Î Î Î
Î
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î ÎÎ Î Î Î
Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î Î
Î
Î
Î Î Î ÎÎ Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î Î
Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
T
A
= 25°C
Typ
5.6
8.0
4.1
5.6
6.1
8.5
5.3
6.8
6.1
8.5
5.6
7.1
4
T
A
=
≤
85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
7.7
11.0
7.5
9.5
−55°C
≤
T
A
≤
125°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
7.7
11.0
7.5
9.5
Symbol
t
PLH
,
t
PHL
Parameter
Test Conditions
Min
Max
Max
Unit
ns
Maximum Propagation Delay;
A to B to Y
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
7.0
10.0
6.4
8.4
t
PLH
,
t
PHL
Maximum Propagation Delay;
S to Y
7.5
10.5
8.1
10.1
7.5
10.5
8.6
10.6
10
8.2
11.5
9.5
11.5
8.2
11.5
8.2
11.5
9.5
11.5
8.2
11.5
ns
t
PLH
,
t
PHL
Maximum Propagation Delay;
E to Y
ns
10.0
12.0
10
10.0
12.0
10
C
IN
Maximum Input Capacitance
pF
Typical @ 25°C, V
CC
= 5.0 V
20
C
PD
Power Dissipation Capacitance (Note 6)
pF
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0 V)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Characteristic
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Typ
0.3
−
0.3
Max
0.8
−
0.8
2.0
0.8
Unit
V
V
V
V
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4
MC74VHCT157A
V
CC
A, B or S
50%
t
PLH
Y
50% V
CC
t
PHL
Y
GND
A, B or S
50%
t
PLH
50% V
CC
t
PHL
V
CC
GND
Figure 5. Switching Waveform
Figure 6. Inverting Switching
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C
L
*
INPUT
*Includes all probe and jig capacitance
Figure 7. Test Circuit
Figure 8. Input Equivalent Circuit
ORDERING INFORMATION
Device
MC74VHCT157ADG
MC74VHCT157ADR2G
MC74VHCT157ADTG
M74VHCT157ADTR2G
MC74VHCT157AMG
MC74VHCT157AMELG
Package
SOIC−16
(Pb−Free)
SOIC−16
(Pb−Free)
TSSOP−16*
TSSOP−16*
SOEIAJ−16
(Pb−Free)
SOEIAJ−16
(Pb−Free)
Shipping
†
48 Units / Rail
2500 Tape & Reel
96 Units / Rail
2500 Tape & Reel
50 Units / Rail
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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5
