MCP6291/1R/2/3/4/5
1.0 mA, 10 MHz Rail-to-Rail Op Amp
Features
•
•
•
•
•
•
•
•
Gain Bandwidth Product: 10 MHz (typical)
Supply Current: I
Q
= 1.0 mA
Supply Voltage: 2.4V to 6.0V
Rail-to-Rail Input/Output
Extended Temperature Range: -40°C to +125°C
Available in Single, Dual and Quad Packages
Single with CS (MCP6293)
Dual with CS (MCP6295)
Description
The Microchip Technology Inc. MCP6291/1R/2/3/4/5
family of operational amplifiers (op amps) provide wide
bandwidth for the current. This family has a 10 MHz
Gain Bandwidth Product (GBWP) and a 65° phase
margin. This family also operates from a single supply
voltage as low as 2.4V, while drawing 1 mA (typical)
quiescent current. In addition, the MCP6291/1R/2/3/4/5
supports rail-to-rail input and output swing, with a
common mode input voltage range of V
DD
+ 300 mV to
V
SS
– 300 mV. This family of operational amplifiers is
designed with Microchip’s advanced CMOS process.
The MCP6295 has a Chip Select (CS) input for dual op
amps in an 8-pin package. This device is manufactured
by cascading the two op amps, with the output of
op amp A being connected to the non-inverting input of
op amp B. The CS input puts the device in a Low-power
mode.
The MCP6291/1R/2/3/4/5 family operates over the
Extended Temperature Range of -40°C to +125°C. It
also has a power supply range of 2.4V to 6.0V.
Applications
•
•
•
•
•
•
Automotive
Portable Equipment
Photodiode Amplifier
Analog Filters
Notebooks and PDAs
Battery-Powered Systems
Design Aids
•
•
•
•
•
•
SPICE Macro Models
FilterLab
®
Software
Mindi™ Simulation Tool
MAPS (Microchip Advanced Part Selector)
Analog Demonstration and Evaluation Boards
Application Notes
Package Types
MCP6291
PDIP, SOIC, MSOP
NC 1
V
IN
_
MCP6291
SOT-23-5
V
OUT
1
V
SS
2
V
IN
+ 3
-
4 V
IN
–
+
5 V
DD
MCP6291R
SOT-23-5
V
OUT
1
V
IN
+ 3
+
V
DD
2
-
5 V
SS
4 V
IN
–
MCP6292
PDIP, SOIC, MSOP
V
OUTA
1
V
INA_
2
V
INA
+ 3
V
SS
4
- +
+ -
8 V
DD
7 V
OUTB
6 V
INB_
5 V
INB
+
8 NC
-
+
7 V
DD
6 V
OUT
5 NC
2
V
IN
+ 3
V
SS
4
MCP6293
PDIP, SOIC, MSOP
NC 1
V
IN
_
MCP6293
SOT-23-6
V
OUT
1
V
SS
2
V
IN
+ 3
6 V
DD
-
5 CS
4 V
IN
–
+
MCP6294
PDIP, SOIC, TSSOP
V
OUTA
1
V
INA
_
8 CS
-
+
7 V
DD
6 V
OUT
5 NC
14
V
OUTD
MCP6295
PDIP, SOIC, MSOP
V
OUTA
/V
INB
+ 1
V
INA_
2
V
INA
+ 3
V
SS
4
- +
+ -
2
2
- + + -
13
V
IND
_
8 V
DD
7 V
OUTB
_
6 V
INB
V
IN
+ 3
V
SS
4
V
INA
+
3
V
DD
4
V
INB
+
5
V
INB_
6
V
OUTB
7
12
V
IND
+
11
V
SS
10
V
INC
+
-+ +-
9
V
_
INC
8
V
OUTC
5 CS
©
2007 Microchip Technology Inc.
DS21812E-page 1
MCP6291/1R/2/3/4/5
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
††
See
Section 4.1.2 “Input Voltage and Current Limits”.
Absolute Maximum Ratings †
V
DD
– V
SS
........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (V
IN
+, V
IN
–) †† ........ V
SS
– 1.0V to V
DD
+ 1.0V
All Other Inputs and Outputs ......... V
SS
– 0.3V to V
DD
+ 0.3V
Difference Input Voltage ...................................... |V
DD
– V
SS
|
Output Short Circuit Current .................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature....................................–65°C to +150°C
Maximum Junction Temperature (T
J
) ......................... .+150°C
ESD Protection On All Pins (HBM; MM)
.............. ≥
4 kV; 400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.4V to +5.5V, V
SS
= GND, V
OUT
≈
V
DD
/2,
V
CM
= V
DD
/2, V
L
= V
DD
/2, R
L
= 10 kΩ to V
L
and CS is tied low (refer to
Figure 1-2
and
Figure 1-3).
Parameters
Input Offset
Input Offset Voltage
Input Offset Voltage
(Extended Temperature)
Input Offset Temperature Drift
Power Supply Rejection Ratio
Input Bias Current
At Temperature
At Temperature
Input Offset Current
Common Mode Input Impedance
Differential Input Impedance
Common Mode (Note 4)
Common Mode Input Range
Common Mode Rejection Ratio
Common Mode Rejection Ratio
Open-Loop Gain
DC Open-Loop Gain (Large Signal)
Output
Maximum Output Voltage Swing
Output Short Circuit Current
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
2:
3:
4:
5:
V
DD
I
Q
2.4
0.7
—
1.0
6.0
1.3
V
mA
T
A
= -40°C to +125°C
(Note 5)
I
O
= 0
V
OL
, V
OH
I
SC
V
SS
+ 15
—
—
±25
V
DD
– 15
—
mV
mA
0.5V Input Overdrive
A
OL
90
110
—
dB
V
OUT
= 0.2V to V
DD
– 0.2V,
V
CM
= V
SS
(Note 1)
V
CMR
CMRR
CMRR
V
SS
−
0.3
70
65
—
85
80
V
DD
+ 0.3
—
—
V
dB
dB
V
CM
= -0.3V to 2.5V, V
DD
= 5V
V
CM
= -0.3V to 5.3V, V
DD
= 5V
V
OS
V
OS
ΔV
OS
/ΔT
A
PSRR
I
B
I
B
I
B
I
OS
Z
CM
Z
DIFF
-3.0
-5.0
—
70
—
—
—
—
—
—
—
—
±1.7
90
±1.0
50
2
±1.0
10 ||6
10
13
||3
13
Sym
Min
Typ
Max
Units
Conditions
V
CM
= V
SS
(Note 1)
T
A
= -40°C to +125°C,
V
CM
= V
SS
(Note 1)
T
A
= -40°C to +125°C,
V
CM
= V
SS
(Note 1)
V
CM
= V
SS
(Note 1)
Note 2
T
A
= +85°C
(Note 2)
T
A
= +125°C
(Note 2)
Note 3
Note 3
Note 3
+3.0
+5.0
—
—
—
200
5
—
—
—
mV
mV
µV/°C
dB
pA
pA
nA
pA
Ω||pF
Ω||pF
Input Bias, Input Offset Current and Impedance
The MCP6295’s V
CM
for op amp B (pins V
OUTA
/V
INB
+ and V
INB
–) is V
SS
+ 100 mV.
The current at the MCP6295’s V
INB
– pin is specified by I
B
only.
This specification does not apply to the MCP6295’s V
OUTA
/V
INB
+ pin.
The MCP6295’s V
INB
– pin (op amp B) has a common mode range (V
CMR
) of V
SS
+ 100 mV to V
DD
– 100 mV.
The MCP6295’s V
OUTA
/V
INB
+ pin (op amp B) has a voltage range specified by V
OH
and V
OL
.
All parts with date codes November 2007 and later have been screened to ensure operation at V
DD
= 6.0V. However,
the other minimum and maximum specifications are measured at 2.4V and or 5.5V.
DS21812E-page 2
©
2007 Microchip Technology Inc.
MCP6291/1R/2/3/4/5
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.4V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2,
V
OUT
≈
V
DD
/2, V
L
= V
DD
/2, R
L
= 10 kΩ to V
L
, C
L
= 60 pF, and CS is tied low (refer to
Figure 1-2
and
Figure 1-3).
Parameters
AC Response
Gain Bandwidth Product
Phase Margin at Unity-Gain
Slew Rate
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
E
ni
e
ni
i
ni
—
—
—
4.2
8.7
3
—
—
—
µV
P-P
nV/√Hz
fA/√Hz
f = 0.1 Hz to 10 Hz
f = 10 kHz
f = 1 kHz
GBWP
PM
SR
—
—
—
10.0
65
7
—
—
—
MHz
°
V/µs
G = +1 V/V
Sym
Min
Typ
Max
Units
Conditions
MCP6293/MCP6295 CHIP SELECT (CS) SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.4V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2,
V
OUT
≈
V
DD
/2, V
L
= V
DD
/2, R
L
= 10 kΩ to V
L
, C
L
= 60 pF, and CS is tied low (refer to
Figure 1-2
and
Figure 1-3).
Parameters
CS Low Specifications
CS Logic Threshold, Low
CS Input Current, Low
CS High Specifications
CS Logic Threshold, High
CS Input Current, High
GND Current per Amplifier
Amplifier Output Leakage
Dynamic Specifications (Note 1)
CS Low to Valid Amplifier Output,
Turn-on Time
CS High to Amplifier Output High-Z
Hysteresis
Note 1:
t
ON
—
4
10
µs
CS Low
≤
0.2 V
DD
, G = +1 V/V,
V
IN
= V
DD
/2, V
OUT
= 0.9 V
DD
/2,
V
DD
= 5.0V
CS High
≥
0.8 V
DD
, G = +1 V/V,
V
IN
= V
DD
/2, V
OUT
= 0.1 V
DD
/2
V
DD
= 5V
V
IH
I
CSH
I
SS
—
0.8 V
DD
—
—
—
—
0.7
-0.7
0.01
V
DD
2
—
—
V
µA
µA
µA
CS = V
DD
CS = V
DD
CS = V
DD
V
IL
I
CSL
V
SS
—
—
0.01
0.2 V
DD
—
V
µA
CS = V
SS
Sym
Min
Typ
Max
Units
Conditions
t
OFF
V
HYST
—
—
0.01
0.6
—
—
µs
V
The input condition (V
IN
) specified applies to both op amp A and B of the MCP6295. The dynamic specification is tested
at the output of op amp B (V
OUTB
).
©
2007 Microchip Technology Inc.
DS21812E-page 3
MCP6291/1R/2/3/4/5
TEMPERATURE SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.4V to +5.5V and V
SS
= GND.
Parameters
Temperature Ranges
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 6L-SOT-23
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-MSOP
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
Note:
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
—
—
—
—
—
—
—
—
256
230
85
163
206
70
120
100
—
—
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
T
A
T
A
-40
-65
—
—
+125
+150
°C
°C
Note
Sym
Min
Typ
Max
Units
Conditions
The Junction Temperature (T
J
) must not exceed the Absolute Maximum specification of +150°C.
1.1
CS
V
IL
t
ON
V
OUT
Hi-Z
V
IH
t
OFF
Hi-Z
V
IN
Test Circuits
The test circuits used for the DC and AC tests are
shown in
Figure 1-2
and
Figure 1-2.
The bypass
capacitors are laid out according to the rules discussed
in
Section 4.6 “Supply Bypass”.
V
DD
R
N
0.1 µF 1 µF
V
OUT
C
L
V
DD
/2 R
G
R
F
V
L
R
L
I
SS
-0.7 µA
(typical)
0.7 µA
(typical)
-1.0 mA
(typical)
10 nA
(typical)
-0.7 µA
(typical)
0.7 µA
(typical)
MCP629X
I
CS
FIGURE 1-1:
Timing Diagram for the
Chip Select (CS) pin on the MCP6293 and
MCP6295.
FIGURE 1-2:
AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
V
DD
R
N
0.1 µF 1 µF
V
OUT
C
L
V
IN
R
G
R
F
V
L
R
L
V
DD
/2
MCP629X
FIGURE 1-3:
AC and DC Test Circuit for
Most Inverting Gain Conditions.
DS21812E-page 4
©
2007 Microchip Technology Inc.
MCP6291/1R/2/3/4/5
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.4V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
≈
V
DD
/2,
V
L
= V
DD
/2, R
L
= 10 kΩ to V
L
, C
L
= 60 pF, and CS is tied low.
12%
11%
10%
9%
8%
7%
6%
5%
4%
3%
2%
1%
0%
25%
Percentage of Occurrences
Percentage of Occurrences
840 Samples
V
CM
= V
SS
20%
15%
10%
5%
0%
840 Samples
V
CM
= V
SS
T
A
= -40°C to +125°C
-2.8
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
0.0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
-8
-6
-4
-2
0
2
4
6
-10
8
2600
2800
Input Offset Voltage (mV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-1:
40%
Input Offset Voltage.
FIGURE 2-4:
30%
Input Offset Voltage Drift.
Percentage of Occurrences
Percentage of Occurrences
35%
30%
25%
20%
15%
10%
5%
0%
210 Samples
T
A
= 85°C
25%
20%
15%
10%
5%
0%
210 Samples
T
A
= +125°C
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
0
10
20
30
40
50
60
70
80
90
100
Input Bias Current (pA)
Input Bias Current (pA)
FIGURE 2-2:
T
A
= +85 °C.
400
Input Bias Current at
FIGURE 2-5:
T
A
= +125 °C.
Input Bias Current at
Input Offset Voltage (µV)
350
300
250
200
150
100
50
Input Offset Voltage (µV)
V
DD
= 2.4V
T
A
= -40°C
T
A
= +25°C
T
A
= +85°C
T
A
= +125°C
0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
800
V
DD
= 5.5V
750
700
650
600
550
500
450
400
350
300
250
200
-0.5 0.0 0.5 1.0 1.5 2.0
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage at V
DD
= 2.4V.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage at V
DD
= 5.5V.
©
2007 Microchip Technology Inc.
DS21812E-page 5
3000
10
