Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
OKI Semiconductor
ML674001/Q4002/Q4003
32-bit ARM-Based General-Purpose Microcontroller
FEDL674001-01
Issue Date: Dec. 15, 2003
GENERAL DESCRIPTION
The ML674001, ML67Q4002, and ML67Q4003 microcontrollers (MCUs) are the members of an extensive and
growing family of 32-bit ARM
®
-based standard products for general-purpose applications that require 32-bit
CPU performance and low cost afforded by MCU integrated features.
ML674001/67Q4002/67Q4003 provide built-in 32Kbyte SRAM, built-in 4Kbyte boot ROM, and a host of other
useful peripherals such as auto-reload timers, watchdog timer (WDT), pulse-width modulators (PWM), A-to-D
converter, expanded UARTs, synchronous serial port, I2C serial interface, GPIOs, DMA controller, external
memory controller, and boundary scan capability. In addition, the ML67Q4002 and ML67Q4003 offer 256
Kbytes and 512 Kbytes of built-in Flash memory respectively. The ML674001, ML67Q4002 and ML67Q4003
are pin-to-pin compatible with each other for easy performance updates.
Oki’s ML674K Family MCUs are capable of executing both the 32-bit ARM instruction set for
high-performance applications as well as the 16-bit Thumb
®
instruction set for high code-density,
power-efficient applications. With an ARM7TDMI
®
core operating at 33 MHz maximum frequency, ARM
Thumb™ capabilities, and robust feature sets, the ML674001 Series MCUs are suitable for an array of
applications including high performance industrial controllers and instrumentation, telecom, PC peripherals,
security/surveillance, test equipment, and a variety of consumer electronics devices.
The ARM7TDMI
®
Advantage
Oki’s ML674K Family of low-cost ARM-based MCUs offers system designers a bridge from 8- and 16-bit
proprietary MCU architectures to ARM’s higher-performance, affordable, widely-accepted industry standard
architecture and its industry-wide support infrastructure. The ARM industry infrastructure offers the system
developers many advantages including software compatibility, many ready-to-use software applications, large
choices among hardware and software development tools. These ARM-based advantages allow Oki’s
customers to better leverage engineering resources, lower development costs, minimize project risks, and reduce
their product time to market. In addition, migration of a design with an Oki standard MCU to an Oki custom
solution is easily facilitated with its award-winning uPLAT™ product development architecture.
FEATURES
•
CPU
32-bit RISC CPU (ARM7TDMI)
32-bit instructions (ARM Instructions) and 16-bit instructions (Thumb Instructions) mixed
General purpose registers : 31 x 32 bits
Built-in Barrel shifter and multiplier (32 bit x 8 bit, Modified Booth’s Algorithm)
Little endian
Built-in debug function
•
Internal memory
RAM
32KB (32-bit access)
FLASH (16-bit access)
ML674001
: ROM-less version
ML67Q4002
: 256Kbytes
ML67Q4003
: 512Kbytes
ARM, ARM7TDMI, Multi-ICE and AMBA are registered trademarks of ARM Ltd., UK.
µPLAT
is Oki's trademark.
The contents of this data sheet are subject to change for modification without notice.
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FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
•
External memory controller
ROM (FLASH): 16 Mbytes
SRAM: 16 Mbytes
DRAM: 64 Mbytes (SDRAM and EDO-DRAM support)
External IO devices: 16 Mbytes x 2 banks, 4 Chip select pins
Wait control input signal for each bank
Independent programmable wait settings for each bank
•
Interrupt controller
28 sources: 23 internals and 5 externals (IRQ: 4, FIQ: 1)
•
DMA controller
2 channels: Dual address mode, cycle steal and burst tranfer mode
•
Timer
1 channel: 16-bit auto reload for operating system
6 channels: 16-bit auto reload for application
1 channel: 16 bit watchdog timer
•
Serial interface
1 channel: UART
1 channel: UART with 16-byte FIFO
1 channel: synchronous
1 channel: I2C (single master)
•
Parallel I/O Port
4 ports x 8 bits (bitwise input/output settings)
1 port x 10 bit (bitwise input/output settings)
•
PWM
2 channels x 16 bits
•
Analog-to-Digital Converter
4 channels x 10 bits
•
Power down mechanism
Standby (all clock stop) and Halt (clock stop by each function block)
Clock gear (selectable 1/1, 1/2, 1/4, 1/8, 1/16 input clock frequency)
•
JTAG interface
Connectable to JTAG ICE
•
Power supply voltage
Core section: 2.25 V to 2.75 V
IO section: 3.0 V to 3.6 V
Analog section: 3.0 V to 3.6 V
•
Operating frequency
1-33 MHz
•
Operating temperature (ambient temperature)
–40°C to +85°C
•
Package
144-pin plastic LQFP (LQFP144-P-2020-0.50)
144-pin plastic LFBGA (P-LFBGA144-1111-0.80)
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FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
BLOCK DIAGRAM
TDI
TDO
nTRST
TMS
TCK
5
Internal (MCP)
FLASH ROM
ML67Q4002 : 256KB
ML67Q4003 : 512KB
PIOC[6:2] / XA[23:19]
XA[18:0]
XD[15:0]
PIOC[7] / XWR
XOE_N
XWE_N
XBWE_N[1:0]
XROMCS_N
XRAMCS_N
XIOCS_N[3:0]
XBS_N[1:0]
PIOD[0] / XWAIT
PIOD[1] / XCAS_N
PIOD[2] / XRAS_N
PIOD[3] / XSDCLK
PIOD[4] / XSDCS_N
PIOD[5] / XSDCKE
PIOD[6] /
XDQM[1]/XCAS_N[1]
PIOD[7] /
XDQM[0]/XCAS_N[0]
2
DMAC
APB
Bridge
APB bus
Internal RAM
32KB
µPLAT-7B
ARM7TDMI
Internal &
External
Memory
controller
TIC
AHB
Bridge
AMBA
AHB bus
DRAMC
Boot ROM
4KB
APB
Bridge
AMBA
APB bus
IRC
Exp.
IRC
PIOB[0] / DREQ[0]
PIOB[2] / DREQ[1]
PIOB[1] / DREQCLR[0]
PIOB[3] / DREQCLR[1]
PIOB[4] / TCOUT[0]
PIOB[5] / TCOUT[1]
2
2
System
TMR
UART
System
Control
16 bit x 6ch
16 bit x 2ch
WDT
UART
(16550)
SSIO
5
I2C
2
8
PWM
2
PIOC[1:0] / PWMOUT[1:0]
PIOA[0] / SIN
PIOA[1] / SOUT
PIOA[2] / CTS
PIOA[3] / DSR
PIOA[4] / DCD
PIOA[5] / DTR
PIOA[6] / RTS
PIOA[7] / RI
PIOE[0] / SCLK
PIOE[1] / SDI
PIOE[2] / SDO
PIOE[3] / SDA
PIOE[4] / SCL
AIN[3:0]
VREF
TMR
RESET_N
PIOB[6] / STXD
PIOB[7] / SRXD
OSC0
OSC1_N
CKOE_N
CKO
PIOE[8:5] / EXINT[3:0]
PIOE[9] / EFIQ_N
CGB
3
VDD_CORE
VDD_IO
GND
AVDD
AGND
DRAME_N
TEST
BSEL[1:0]
FWR
JSEL
A/D
5
GPIO
42
PIOA[7:0]
PIOB[7:0]
PIOC[7:0]
PIOD[7:0]
PIOE[9:0]
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FEDL674001-01
OKI Semiconductor
ML674001/67Q4002/67Q4003
PIN CONFIGURATION (TOP VIEW)
144-Pin Plastic LFBGA
13
N
M
L
K
J
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
XA[14]
4
XA[11]
3
XA[9]
2
XA[7]
1
XA[6]
PIOD[6]/
XIOCS_ XIOCS_ XRAMC XBWE_
PIOC[4]/
XDQM[1
XOE_N
XA[16]
N[3]
N[1]
S_N
N[0]
XA[21]
]
PIOD[7]/
XIOCS_ XIOCS_
PIOC[7]/ PIOC[6]/ PIOC[2]/
XWE_N
XA[17]
XDQM[0
N[2]
N[0]
XWR
XA[23] XA[19]
]
PIOB[1]/
PIOB[2]/ PIOB[0]/ XROMC XBWE_ PIOC[5]/ PIOC[3]/
DREQC
XA[18]
DREQ[1] DREQ[0] S_N
N[1]
XA[22] XA[20]
LR[0]
PIOB[3]/ PIOB[5]/
DREQC TCOUT[ VDD_IO
1]
LR[1]
PIOC[0]/
PWMOU
T[0]
GND
GND
VDD_IO
VDD_C
VDD_IO
ORE
GND
XA[15]
XA[13]
XA[10]
XA[4]
XA[5]
XA[12]
VDD_IO
XA[8]
XA[2]
GND
GND
XA[3]
XA[0]
XD[13]
XA[1]
PIOB[4]/ PIOC[1]/
TCOUT[ PWMOU
T[1]
0]
VDD_IO XD[15]
VDD_C
ORE
XD[11]
XD[14]
XBS_N[ XBS_N[ PIOD[0]/ VDD_C
0]
1]
XWAIT
ORE
PIOD[2]/ PIOD[1]/
VDD_IO
XRAS_N XCAS_N
GND
XD[10]
NC
XD[12]
144pin LFBGA
(TOP VIEW)
VDD_IO
XD[8]
NC
XD[9]
PIOD[4]/
PIOD[5]/
PIOD[3]/
XSDCS_
BSEL[1] XSDCK
XSDCLK
N
E
PIOE[7]/
PIOE[8]/ PIOE[5]/
BSEL[0]
EXINT[2]
EXINT[3] EXINT[0]
PIOE[0]/ PIOE[6]/ PIOE[9]/ PIOE[2]/
PIOA[1]/
OSC1_N
SCLK EXINT[1] EFIQ_N SDO
SOUT
TDI
PIOE[1]/
SDI
TDO
CKO
TMS
CKOE_
N
VDD_IO
AVDD
PIOA[0]/
SIN
TEST
AIN[0]
NC
VDD_IO
GND
XD[7]
XD[6]
XD[5]
GND
XD[2]
NC
XD[4]
GND
VDD_IO
XD[3]
XD[1]
RESET_
N
AIN[1]
AIN[3]
VDD_C PIOA[5]/
ORE
DTR
GND
FWR
XD[0]
nTRST
TCK
GND
DRAME
_N
VREF
AGND
PIOA[3]/ PIOA[7]/ PIOE[4]/ PIOB[7]/
DSR
RI
SCL
SRXD
NC
NC
NC
JSEL
OSC0
AIN[2]
PIOA[2]/ PIOA[4]/ PIOA[6]/ PIOE[3]/ PIOB[6]/
CTS
DCD
RTS
SDA
STXD
13
Notes:
12
11
10
9
8
7
6
5
4
3
2
1
NC pins are electrically unconnected in the package.
NC pins can be connected to Vdd or GND.
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