FEDL67Q4060-01
Issue Date: Jan. 21, 2008
ML67Q4060/61/50/51
32-bit General-Purpose ARM-Based Microcontroller
OVERVIEW
This LSI is a general-purpose microcontroller that integrates peripheral functions such as I2C, I2S, and various
serial interfaces. It uses the ARM7TDMITM 32-bit RISC CPU developed by ARM Limited as its core.
The following describes the features of the ML67Q4050/ML67Q4060 Series.
FEATURES
ATM7TDMI up to 33.33MHz
16KB RAM processor bus connection
Built-in Flash ROM processor bus connection of the 128KB(ML67Q4051
and ML67Q4061) or 64KB (ML67Q4050 and ML67Q4060)
External memory controller (Function for the ML67Q4050 series only)
Setting of programmable access timing for each space
ROM (FLASH) access function
SRAM access function
External I/O access function
Interrupt controller/extended interrupt controller
FIQ: 1 source (NMI pin)
IRQ: 31 sources (40 sources for the ML67Q4050 Series)
Seven levels of interrupt priorities can be set for each interrupt source.
System timer
16-bit auto-reload timer:
1ch
SIO (UART)
Full-duplex start-stop synchronization method
DMA controller
2ch
Watchdog timer
16-bit timer
A/D converter
10-bit sequential comparison type
4ch
I2C bus controller
Philips I2C bus specification Ver 2.1 conformed controller
Flexible timer
16-bit timer
6ch
Operable in each of the modes, Auto Reload Timer (ART)/Compare Out
(CMO)/Pulse Width Modulation (PWM)/Capture (CAP)
RTC
Generates 1 second from 32.768 kHz
I2S transmit/receive
Connection interface for general-purpose DACs/ADCs. Conforms to
Philips I2S (the Inter-IC Sound) specification
GPIO
Built-in GPIO of 8 bits
1ch, 7 bits
2ch, and 6 bits
3ch
UART
2 channels of serial communication function with FIFO
SPI
2 channel of full duplex serial peripheral interface
Clock
Main clock oscillator (16 to 33.333MHz)
RTC clock oscillator (32.768kHz clock)
Power management
Power saving mode
CPU halt mode: Stops only the CPU clock.
STOP mode: Stops all the clocks of the chip except RTC
Package
64pin TQFP(TQFP64-P-1010-0.50-K)
84pin LFBGA(P-LFBGA84-0909-0.80)
64pin WCSP(P-VFBGA64-5.09
4.84-0.50-W, P-VFLGA64-5.09
4.84-0.50-W)
144pin LQFP(LQFP144-P-2020-0.50-ZK)
144-pin LFBGA (P-LFBGA144-1111-0.80)
CPU
Internal memory
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PLAT-7B
ML67Q406X
ML67Q4060 Series
LAPIS Semiconductor
BLOCK DIAGRAM
CGB
SYSC
SIO
ARM7TDMI
Note:
ML67Q4060: Flash ROM 64KB
ML67Q4061: Flash ROM 128KB
System
Timer
IMEMC
Embedded
Flash ROM
64or128KB
Flash
JTAG IF
IRC
TIC
RAM
16KB
SYSC
I2S
I2C
SPI
2ch
FTM
6ch
WDT
GPIO
40
RTC
Defslv
DMAC
2ch
BootROM
8KB
ML67Q4060 Series Block Diagram
ADC
4ch
UART
2ch
ML67Q4060/61/50/51
FEDL67Q4060-01
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PLAT-7B
SYSC
ARM7TDMI
SIO
ML67Q4050 Series
LAPIS Semiconductor
CGB
ML67Q405X
Note:
ML67Q4050: Flash ROM 64KB
ML67Q4051: Flash ROM 128KB
System
Timer
PBIC
IMEMC
RAM
16KB
Embedded
Flash ROM
64or128KB
IRC
TIC
Flash
JTAG IF
I2S
I2C
SPI
2ch
FTM
6ch
WDT
GPIO
108
RTC
SYSC
Defslv
DMAC
2ch
BootROM
8KB
ML67Q4050 Series Block Diagram
ADC
4ch
UART
2ch
ML67Q4060/61/50/51
FEDL67Q4060-01
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FEDL67Q4060-01
LAPIS Semiconductor
ML67Q4060/61/50/51
PIN CONFIGURATION
144pin LQFP (LQFP144-P-2020-0.50-ZK)
OE_N
ROMCS_N
COREVDD
RAMCS_N
IOCS0_N
IOCS1_N
BOOT1
IOVDD
EXIROME
GND
WR _N
BS0_N
PB0
PB1
PB2
PE3
PE4
PF0
PF1
PF2
PF3
PF4
PF5
IOVDD
XD0
XD1
EXBUSE
GND
FLASHT EST
XD2
XD3
XD4
XD5
COR EVDD
XD6
XD7
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
BS1_N
GND
BS2_N
PB3
BS3_N
XA1
XA2
PB4
XA3
XA4
XA5
XA6
PB5
IOVDD
PE0
GND
PE1
GND
PE2
IOVDD
PD0
PD1
PD2
PD3
XA7
XA8
XA9
XA10
TEST1
XA11
XA12
XA13
TEST2
XA14
GND
XA15
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Top View
INDEX MARK
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
XD8
GND
BOOT CLK
XD9
XD10
XD11
PC0
XD12
XD13
IOVDD
XD14
XD15
PC1
PC2
PC3
PC4
PC5
XD16
R ESETN
GND
GND
RSTOUT_N
PC6
PC7
PD4
XD17
IOVDD
XD18
XD19
PE5
XD20
XD21
XD22
PE6
GND
XD23
XA16
XA17
COREVDD
XA18
IOVDD
XA19
PLLGND
PLLGND
XA20
PLLVDD
PLLVDD
XA21
RTCCLK_N
RTCCLK_P
GND
GND
SYSCLK_P
SYSCLK_N
XA22
PA0
PA1
PA2
PA3
XA0
IOVDD
PA4
XD31
XD30
XD29
PA5
XD28
XD27
XD26
COREVDD
XD25
XD24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
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FEDL67Q4060-01
LAPIS Semiconductor
ML67Q4060/61/50/51
144pin LFBGA (P-LFBGA144-1111-0. 80)
XA16
13
XA15
XA14
XA12
XA10
XA7 IOVDD
PB5
XA4
XA2
PB3
GND
BS1_N
XA17
12
GND
XA19
XA13
CORE
VDD
XA9
PD3
PD2
PD0
PE1
PE2
IOVDD XA6
GND
PB4
XA3
XA1
ROMCS
OE_N
_N
IOCS0 CORE
_N
VDD
IOCS1
_N
EX
IROME
XA18
11
XA11 TEST1
BS3_N BS2_N
PLL
GND
10
XA20 IOVDD TEST2
XA21
PLL
GND
GND
PLL
VDD
GND
XA8
PD1
GND
PE0
XA5
RAMCS
BOOT1 GND
_N
WR_N
IOVDD
PB0
PLL
VDD
9
RTC
RTC
CLK_N CLK_P
8
PB2
PE3
PB1 BS0_N
PA0
7
SYS
SYS
XA22
CLK_P
CLK_N
PA3
PA1
PA2
PF1
PF0
PF2
PE4
IOVDD
6
PF4
PF3
FLASH
TEST
XD4
CORE
VDD
PF5
IOVDD
XD30
5
XA0
XD29
PA4
RST
RESETN PC3
OUT_N
XD16
PC4
XD1
XD0
EXBUSE
XD28
4
XD31
PA5
XD26
XD17
XD14
XD9
GND
XD2
CORE
VDD
3
XD27
PE6
XD21
XD19 GND
XD12
PC0
XD3
XD5
XD24
2
XD25
XD20
XD18
PD4
PC6
GND
PC2
PC1
IOVDD XD10
BOOT
CLK
GND
XD6
XD23
1
GND XD22
PE5
IOVDD PC7
PC5
XD15
XD13
XD11
XD8
XD7
A
B
C
D
E
F
G
H
J
K
L
M
N
TOP VIEW
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Microchip MCU