CCD Area Image Sensor
MN39260FH
4.5 mm (type-1/4) 810k-pixel CCD Area Image Sensor
■
Overview
The MN39260FH is a 4.5 mm (type-1/4) interline
transfer CCD (IT-CCD) solid state image sensor device.
This device uses photodiodes in the optoelectric con-
version section and CCDs for signal readout. The elec-
tronic shutter function has made an exposure time of 1/10 000
seconds possible. Further, this device has the features of
high sensitivity, low noise, broad dynamic range, and low
smear.
This device has a total of 802 579 pixels (1 007 hori-
zontal
×
797 vertical) and provides stable and clear images
with a resolution of 600 horizontal TV-lines and 420 ver-
tical TV-lines.
Part Number
Size
System Color or B/W
PAL
Color
(Top View)
■
Pin Assignments
φ
V4
φ
V3
φ
V2
φ
V1
GND
TEST
V
DD
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PT
Sub
φ
H2
φ
H1
φ
R
GND
VO
MN39260FH 4.5 mm (type-1/4)
■
Features
•
Effective pixel number 962 (horizontal)
×
774 (vertical)
•
High sensitivity
•
Broad dynamic range
•
Low smear
•
Electronic shutter
■
Applications
•
Camcorders
•
FA, OA cameras
Publication date: September 2001
SMD00004BEC
1
MN39260FH
■
Block Diagram
(4 columns OB
+
962 columns valid area
+ 41
columns OB)
1
(2 dummies
+
OB11
+
valid area 774
+
OB12 )
Sub
13
φ
V4
2
φ
V3
3
φ
4
V2
Photo diode
VO
V
DD
GND
8
7
9
Output section
Vertical shift register
φ
V1
Horizontal register (one dummy at the front, no dummy at the back)
GND
6 TEST
*1
14
PT
5
10
11
φ
H1
Description
Pin No. Symbol
8
9
10
11
12
13
14
VO
GND
φ
R
φ
H1
φ
H2
Sub
PT
φ
R
*1 : TEST pin must be left open, because the pin outputs CCD internal bias voltage.
■
Pin Descriptions
Pin No. Symbol
1
2
3
4
5
6
7
φ
V4
φ
V3
φ
V2
φ
V1
GND
TEST
V
DD
Description
Video output
GND
Reset pulse (RG)
Horizontal register clock pulse 1
Horizontal register clock pulse 2
Substrate
P-well for protection circuit
Vertical shift register clock pulse 4
Vertical shift register clock pulse 3
Vertical shift register clock pulse 2
Vertical shift register clock pulse 1
GND
TEST pin (OPEN)
*1
Power supply
Note) *1: TEST pin must be left open, because the pin outputs CCD internal bias voltage.
■
Device Parameter (H
×
V)
Parameter
Pixel number
*1
Image sensing block dimension
Pixel dimension
Note) *1: OB columns are not included.
Value
962
×
774
3.703 7
×
2.709 0
3.85
×
3.50
Unit
pixel
mm
2
µm
2
2
SMD00004BEC
φ
H2
12
MN39260FH
■
Absolute Maximum Ratings and Operating Conditions
Absolute maximum rating
Parameter
V
DD
V
PT *3, 4
GND
V
φR
V
φH1
V
φH2
V
Sub *2
φV
Sub *1
V
φV1
*3, 4
High
Middle
Low
V
φV2
*3, 4
V
φV3
*3, 4
Middle
Low
High
Middle
Low
V
φV4
*3, 4
Middle
Low
Operating temperature
Storage temperature
−
0.2
−9
−9
−9
−9
−10
−30
35
18
15
18
15
60
80
High-Low
Bias
High
Low
High
Low
−
0.2
−
0.2
8
8
Lower limit
−
0.2
−10.0
Upper limit
18
0.2
Min
14.5
−7.5
3.0
(Supplied internally)
3.0
−
0.2
3.0
−
0.2
(Supplied internally)
21.0
14.5
−
0.05
−7.5
−
0.05
−7.5
14.5
−
0.05
−7.5
−
0.05
−7.5
22.0
15.0
0
−7.0
0
−7.0
15.0
0
−7.0
0
−7.0
25
23.0
15.5
0.05
−6.5
0.05
−6.5
15.5
0.05
−6.5
0.05
−6.5
3.3
0
3.3
0
3.6
0.2
3.6
0.2
Operating condition
Typ
15.0
−7.0
0
3.3
Max
15.5
−6.5
3.6
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
(Reference voltage)
8
SMD00004BEC
3
MN39260FH
■
Absolute Maximum Ratings and Operating Conditions (continued)
Note) 1. Standard photo detecting condition
Standard photo detecting condition stands for detecting image with a light source of color temperature of 2 856K, luminance
of 1 050 cd/m
2
, and using a color temperature conversion filter LB-40 (HOYA), infrared cut filter CAW-500S with thickness
2.5 mm for a light path and with F8 lens aperture. The quantity of the incidental light to a photo-detecting surface under the
above condition is defined as the standard quantity of light.
2. *1: V
Sub
when using electronic shutter function
φV
Sub
H
φV
Sub
(V)
φV
Sub
L
GND
V
Sub
(V)
(Supplied internally)
*
φSub
pulse generates once every 1 V period.
*2: V
Sub
supplied internally is the voltage suppressing the blooming generation at
×500
light quantity relative to the
standard light quantity.
*3: Relation between V
PT
and V
φVL
Set V
PT
under the following condition against VL of a vertical transfer clock waveform.
V
PT
≤
VL (V
φV1L
to V
φV4L
)
−
0.2
<
V
φV
−
V
PT
<
24.5 (V)
*4: Absolute maximum ratings
■
Optical Characteristics
Parameter
Carrier saturation output
Sensitivity
Vertical smear
Symbol
Sc
So
Sm
J chart
J chart F1.4, 1/32 ND
1/10 V chart, F1.4
Conditions
Min
500
80
Typ
110
Max
0.01
Unit
mV
mV
%
Note) The above-mentioned characteristics are the values on driving the device for the imaging stabilizer mode (1/60 seconds
accumulation).
4
SMD00004BEC
MN39260FH
■
Timing Diagram
•
High speed pulse timing
φ
H1
50%
50%
50%
27.8 ns
±
3 ns
CCD output
φ
R
50%
50%
1 ns
±
3 ns
10 ns
∼
13.9 ns
Clamp pulse
(DS1)
50%
50%
3 ns
±
3 ns
13.9 ns
±
3 ns
Sampling pulse
(DS2)
50%
50%
4 ns
±
3 ns
13.9 ns
±
3 ns
SMD00004BEC
5
