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MR27V3252J-XXXTN

描述:
MASK ROM, 2MX16, 70ns, CMOS, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48
分类:
存储    存储   
制造商:
概述
MASK ROM, 2MX16, 70ns, CMOS, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48
器件参数
参数名称
属性值
厂商名称
LAPIS Semiconductor Co Ltd
零件包装代码
TSOP1
包装说明
TSOP1, TSSOP48,.8,20
针数
48
Reach Compliance Code
unknown
ECCN代码
EAR99
最长访问时间
70 ns
备用内存宽度
8
JESD-30 代码
R-PDSO-G48
长度
18.4 mm
内存密度
33554432 bit
内存集成电路类型
MASK ROM
内存宽度
16
功能数量
1
端子数量
48
字数
2097152 words
字数代码
2000000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
2MX16
封装主体材料
PLASTIC/EPOXY
封装代码
TSOP1
封装等效代码
TSSOP48,.8,20
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE
并行/串行
PARALLEL
电源
3.3 V
认证状态
Not Qualified
座面最大高度
1.2 mm
最大待机电流
0.00001 A
最大压摆率
0.05 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子形式
GULL WING
端子节距
0.5 mm
端子位置
DUAL
宽度
12 mm
文档预览
FEDR27V3252J-002-02
Issue Date: Oct. 01, 2008
MR27V3252J
2M–Word
×
16–Bit or 4M–Word
×
8–Bit
Page Mode
P2ROM
PIN CONFIGURATION (TOP VIEW)
FEATURES
· 2,097,152-word
×
16-bit / 4,194,304-word
×
8-bit electrically
switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6 V power supply
· Random Access time.....................70 ns MAX
· Page Access time ..........................25 ns MAX
· Operating current ..........................50 mA MAX
· Standby current .............................10 µA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR27V3252J-xxxMA
44-pin plastic SOP (SOP44-P-600-1.27-K)
· MR27V3252J-xxxTN
48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
V
SS
OE#
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
A20
43
A19
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE#
32
V
SS
31
D15/A–1
30
D7
29
D14
28
D6
27
D13
26
D5
25
D12
24
D4
23
V
CC
44SOP
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing.
Advancements in this technology allows production costs to be
equivalent to MASKROM and has many advantages and added
benefits over the other non-volatile technologies, which
include the following;
· Short lead time,
since the P2ROM is programmed at the
final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged
products are maintained to provide an aggressive lead-time
and minimize liability as a custom product.
· No mask charge,
since P2ROMs do not utilize a custom
mask for storing customer code, no mask charges apply.
· No additional programming charge,
unlike Flash and
OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory
with minimal effect on the production throughput. The cost
is included in the unit price.
· Custom Marking is
available at no additional charge.
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
NC
NC
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
A16
47
BYTE#
46
V
SS
45
D15/A–1
44
D7
43
D14
42
D6
41
D13
40
D5
39
D12
38
D4
37
V
CC
36
D11
35
D3
34
D10
33
D2
32
D9
31
D1
30
D8
29
D0
28
OE#
27
V
SS
26
CE#
25
A0
48TSOP(Type-I)
1/9
FEDR27V3252J-002-02
MR27V3252J / P2ROM
BLOCK DIAGRAM
A–1
× 8/× 16 Switch
CE#
CE
OE#
OE
BYTE#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
Row Decoder
Memory Cell Matrix
2M × 16-Bit or 4M × 8-Bit
Address Buffer
Column Decoder
Multiplexer
Output Buffer
D0
D1
D2
D3
D4
D5
D6
D7
D8
D10
D9
D12
D14
D15
D11
D13
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A20
D0 to D14
CE#
OE#
BYTE#
V
CC
V
SS
NC
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
No connect
Functions
2/9
FEDR27V3252J-002-02
MR27V3252J / P2ROM
FUNCTION TABLE
Mode
Read (16-Bit)
Read (8-Bit)
Output disable
Standby
∗:
Don’t Care (H or L)
CE#
L
L
L
H
OE#
L
L
H
BYTE#
H
L
H
L
H
L
3.3 V
D
OUT
V
CC
D0 to D7
D8 to D14
D
OUT
Hi–Z
Hi–Z
Hi–Z
L/H
D15/A–1
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating temperature under bias
Storage temperature
Input voltage
Output voltage
Power supply voltage
Power dissipation per package
Output short circuit current
Symbol
Ta
Tstg
V
I
V
O
V
CC
P
D
I
OS
Ta = 25°C
relative to V
SS
Condition
Value
0 to 70
–55 to 125
–0.5 to V
CC
+0.5
–0.5 to V
CC
+0.5
–0.5 to 5
1.0
10
Unit
°C
°C
V
V
V
W
mA
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Max.
Unit
3.6
V
CC
+0.5∗
0.6
V
V
V
Parameter
V
CC
power supply voltage
Input “H” level
Input “L” level
Symbol
V
CC
V
IH
V
IL
Condition
V
CC
= 3.0 to 3.6 V
Min.
3.0
2.2
–0.5∗∗
Typ.
Voltage is relative to V
SS
.
: Vcc+1.5V (Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V (Min.) when pulse width of undershoot is less than 10ns.
PIN CAPACITANCE
(V
CC
= 3.3 V, Ta = 25°C, f = 1 MHz)
Typ.
Max.
Unit
8
200
10
pF
Parameter
Input
BYTE#
Output
Symbol
C
IN1
C
IN2
C
OUT
Condition
V
I
= 0 V
V
O
= 0 V
Min.
3/9
FEDR27V3252J-002-02
MR27V3252J / P2ROM
ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Min.
Typ.
Max.
Unit
2.2
–0.5∗∗
2.4
5
5
10
1
50
V
CC
+0.5∗
0.6
0.4
μA
μA
μA
mA
mA
V
V
V
V
Parameter
Input leakage current
Output leakage current
V
CC
power supply current
(Standby)
V
CC
power supply current
(Read)
Input “H” level
Input “L” level
Output “H” level
Output “L” level
Symbol
I
LI
I
LO
I
CCSC
I
CCST
I
CCA1
V
IH
V
IL
V
OH
V
OL
Condition
V
I
= 0 to V
CC
V
O
= 0 to V
CC
CE# = V
CC
CE# = V
IH
OE# = V
IH,
f = 10MHz
I
OH
= –1 mA
I
OL
= 2 mA
Voltage is relative to V
SS
.
: Vcc+1.5V (Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V (Min.) when pulse width of undershoot is less than 10ns.
AC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Min.
Max.
Unit
70
25
0
0
0
70
25
70
25
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Address cycle time
Address access time
Page cycle time
Page access time
CE# access time
OE# access time
Output disable time
Output hold time
Symbol
t
C
t
ACC
t
PC
t
PAC
t
CE
t
OE
t
CHZ
t
OHZ
t
OH
Condition
CE# = OE# = V
IL
OE# = V
IL
CE# = V
IL
OE# = V
IL
CE# = V
IL
CE# = OE# = V
IL
Measurement conditions
Input signal level ....................................... 0 V/3 V
Input timing reference level....................... 1/2Vcc
Output load ............................................... 50 pF
Output timing reference level .................... 1/2Vcc
Output load
Output
50 pF
(Including scope and jig)
4/9
FEDR27V3252J-002-02
MR27V3252J / P2ROM
TIMING CHART (READ CYCLE)
RANDOM ACCESS MODE READ CYCLE
t
C
t
C
Address
t
CE
CE#
t
OE
t
OH
t
ACC
t
OH
t
CHZ
OE#
t
ACC
Valid Data
Dout
Hi-Z
Valid Data
Hi-Z
t
OHZ
PAGE ACCESS MODE READ CYCLE
t
C
A3 to A20
t
PC
A-1 to A2 (Byte mode)
A0 to A2 (Word mode)
t
CE
t
OH
t
PC
CE#
t
OE
OE#
t
ACC
Dout
Hi-Z
Hi-Z
t
PAC
t
PAC
t
OHZ
t
CHZ
5/9
参数对比
与MR27V3252J-XXXTN相近的元器件有:MR27V3252J-XXXMA。描述及对比如下:
型号 MR27V3252J-XXXTN MR27V3252J-XXXMA
描述 MASK ROM, 2MX16, 70ns, CMOS, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48 MASK ROM, 2MX16, 70ns, CMOS, PDSO44, 0.600 INCH, 1.27 MM PITCH, PLASTIC, SOP-44
厂商名称 LAPIS Semiconductor Co Ltd LAPIS Semiconductor Co Ltd
零件包装代码 TSOP1 SOIC
包装说明 TSOP1, TSSOP48,.8,20 SOP, SOP44,.63
针数 48 44
Reach Compliance Code unknown unknow
ECCN代码 EAR99 EAR99
最长访问时间 70 ns 70 ns
备用内存宽度 8 8
JESD-30 代码 R-PDSO-G48 R-PDSO-G44
长度 18.4 mm 28.15 mm
内存密度 33554432 bit 33554432 bi
内存集成电路类型 MASK ROM MASK ROM
内存宽度 16 16
功能数量 1 1
端子数量 48 44
字数 2097152 words 2097152 words
字数代码 2000000 2000000
工作模式 ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 70 °C 70 °C
组织 2MX16 2MX16
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TSOP1 SOP
封装等效代码 TSSOP48,.8,20 SOP44,.63
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, THIN PROFILE SMALL OUTLINE
并行/串行 PARALLEL PARALLEL
电源 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified
座面最大高度 1.2 mm 3.1 mm
最大待机电流 0.00001 A 0.00001 A
最大压摆率 0.05 mA 0.05 mA
最大供电电压 (Vsup) 3.6 V 3.6 V
最小供电电压 (Vsup) 3 V 3 V
标称供电电压 (Vsup) 3.3 V 3.3 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL
端子形式 GULL WING GULL WING
端子节距 0.5 mm 1.27 mm
端子位置 DUAL DUAL
宽度 12 mm 13 mm
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