FEDR27V6452G-002-06
Issue Date: Jul. 9, 2004
MR27V6452G
4M–Word
×
16–Bit or 8M–Word
×
8–Bit
Page Mode
P2ROM
PIN CONFIGURATION (TOP VIEW)
FEATURES
· 4,194,304-word
×
16-bit / 8,388,608-word
×
8-bit electrically
switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6 V power supply
·Random Access time
100 ns MAX
·Page Access time
30 ns MAX
· Operating current
50 mA MAX (5MHz)
· Standby current
10 µA MAX
· Input/Output TTL compatible
· Three-state output
A21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
V
SS
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
44
A20
43
A19
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE#
32
V
SS
31
D15/A–1
30
D7
29
D14
28
D6
27
D13
26
D5
25
D12
24
D4
23
V
CC
PACKAGES
· MR27V6452G-xxxMA
44-pin plastic SOP (SOP44-P-600-1.27-K)
·MR27V6452G-xxxTN
48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
OE#
14
15
16
17
18
19
20
21
22
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor’s technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing. Advancements in this
technology allows production costs to be equivalent to
MASKROM and has many advantages and added benefits over
the other non-volatile technologies, which include the
following;
·
Short lead time,
since the P2ROM is programmed at the
final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged
products are maintained to provide an aggressive lead-time
and minimize liability as a custom product.
·
No mask charge,
since P2ROMs do not utilize a custom
mask for storing customer code, no mask charges apply.
·
No additional programming charge,
unlike Flash and
OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the
factory with minimal effect on the production throughput.
The cost is included in the unit price.
·
Custom Marking is
available at no additional charge.
·
Pin Compatible with Mask ROM
and some FLASH
products.
44SOP
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
NC
NC
A21
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
A16
47
BYTE#
46
V
SS
45
D15/A–1
44
D7
43
D14
42
D6
41
D13
40
D5
39
D12
38
D4
37
V
CC
36
D11
35
D3
34
D10
33
D2
32
D9
31
D1
30
D8
29
D0
28
OE#
27
V
SS
26
CE#
25
A0
48TSOP(Type-I)
1/9
FEDR27V6452G-002-06
MR27V6452G / P2ROM
BLOCK DIAGRAM
A–1
× 8/× 16 Switch
CE#
CE
OE#
OE
BYTE#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
Row Decoder
Memory Cell Matrix
4M × 16-Bit or 8M × 8-Bit
Address Buffer
Column Decoder
Multiplexer
Output Buffer
D0
D1
D2
D3
D4
D5
D6
D7
D8
D10
D9
D12
D14
D15
D11
D13
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A21
D0 to D14
CE#
OE#
BYTE#
V
CC
V
SS
NC
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
No connect
Functions
Data output / Address input
2/9
FEDR27V6452G-002-06
MR27V6452G / P2ROM
FUNCTION TABLE
Mode
Read (16-Bit)
Read (8-Bit)
Output disable
Standby
CE#
L
L
L
H
OE#
L
L
H
∗
BYTE#
H
L
H
L
H
L
3.3 V
D
OUT
V
CC
D0 to D7
D8 to D14
D
OUT
Hi–Z
Hi–Z
Hi–Z
L/H
∗
∗
D15/A–1
∗:
Don’t Care (H or L)
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating temperature under bias
Storage temperature
Input voltage
Output voltage
Power supply voltage
Power dissipation per package
Output short circuit current
Symbol
Ta
Tstg
V
I
V
O
V
CC
P
D
I
OS
Ta = 25°C
—
relative to V
SS
Condition
—
Value
0 to 70
–55 to 125
–0.5 to V
CC
+0.5
–0.5 to V
CC
+0.5
–0.5 to 5
1.0
10
Unit
°C
°C
V
V
V
W
mA
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Parameter
V
CC
power supply voltage
Input “H” level
Input “L” level
Symbol
V
CC
V
IH
V
IL
V
CC
= 3.0 to 3.6 V
Condition
Min.
3.0
2.2
–0.5∗∗
Typ.
—
—
—
Max.
3.6
V
CC
+0.5∗
0.6
Unit
V
V
V
Voltage is relative to V
SS
.
∗
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
PIN CAPACITANCE
(V
CC
= 3.3 V, Ta = 25°C, f = 1 MHz)
Parameter
Input
BYTE#
Output
Symbol
C
IN1
C
IN2
C
OUT
Condition
V
I
= 0 V
V
O
= 0 V
Min.
—
—
—
Typ.
—
—
—
Max.
8
200
10
pF
Unit
3/9
FEDR27V6452G-002-06
MR27V6452G / P2ROM
ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Parameter
Input leakage current
Output leakage current
V
CC
power supply current
(Standby)
V
CC
power supply current
(Read)
Input “H” level
Input “L” level
Output “H” level
Output “L” level
Symbol
I
LI
I
LO
I
CCSC
I
CCST
I
CCA
V
IH
V
IL
V
OH
V
OL
Condition
V
I
= 0 to V
CC
V
O
= 0 to V
CC
CE# = V
CC
CE# = V
IH
CE# = V
IL
, OE# = V
IH
f=5MHz
—
—
I
OH
= –2 mA
I
OL
= 4 mA
Min.
—
—
—
—
—
2.2
–0.5∗∗
2.4
—
Typ.
—
—
—
—
—
—
—
—
—
Max.
10
10
10
1
50
V
CC
+0.5∗
0.6
—
0.4
Unit
μA
μA
μA
mA
mA
V
V
V
V
Voltage is relative to V
SS
.
∗
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
AC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Parameter
Address cycle time
Address access time
Page cycle time
Page access time
CE# access time
OE# access time
Output disable time
Output hold time
Symbol
t
C
t
ACC
t
PC
t
PAC
t
CE
t
OE
t
CHZ
t
OHZ
t
OH
Condition
—
CE# = OE# = V
IL
—
—
OE# = V
IL
CE# = V
IL
OE# = V
IL
CE# = V
IL
CE# = OE# = V
IL
Min.
100
—
30
—
—
—
0
0
0
Max.
—
100
—
30
100
25
20
20
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Measurement conditions
Input signal level --------------------------------------0 V/3.0 V
Input timing reference level-------------------------1/2Vcc
Output load ---------------------------------------------50 pF
Output timing reference level ----------------------1/2Vcc
Output load
Output
50 pF
(Including scope and jig)
4/9
FEDR27V6452G-002-06
MR27V6452G / P2ROM
TIMING CHART (READ CYCLE)
RANDOM ACCESS MODE READ CYCLE
t
C
Address
t
OH
t
CE
CE#
t
CHZ
t
OE
OE#
t
ACC
Dout
Hi-Z
Valid Data
Valid Data
Hi-Z
t
OHZ
t
OH
t
ACC
t
C
PAGE ACCESS MODE READ CYCLE
t
C
A3 to A21
t
PC
A-1 to A2 (Byte mode)
A0 to A2 (Word mode)
t
CE
t
OH
t
PC
CE#
t
OE
OE#
t
ACC
Dout
Hi-Z
Hi-Z
t
PAC
t
PAC
t
OHZ
t
CHZ
5/9
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