Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
Semiconductor
MS81V10160
(664,320-word
×
16-bit) FIFO memory
This version: Sep. 2000
Preliminary
GENERAL DESCRIPTION
The MS81V10160 is a 10Mb FIFO (First-In First-Out) memory designed for 664,320-words
×
16-bit high-speed
asynchronous read/write operation.
The MS81V10160 is best suited for a field memory for digital TVs or LCD panels which require high-speed, large
memory , and is not designed for high end use in professional graphics systems, which require long term picture
storage and data storage.
The MS81V10160 is provided with independent control clocks to support asynchronous read and write operations.
Different clock rates are also supported, which allow alternate data rates between write and read data streams.
The first data read operation can be performed after 1600 ns + 4 cycles from read reset and the first data write
operation is enabled after 1600 ns + 4 cycles from write reset. Thereafter, the high-speed read/write operation is
possible every cycle time.
Additionally, a write mask function by IE pin and a read-data skipping function by OE pin implement image data
processing easily.
The MS81V10160 provides high speed FIFO (First-in First-out) operation without external refreshing:
MS81V10160 refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access
operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the
power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration
logic.
The MS81V10160’s function is simple, and similar to a digital delay device whose delay-bit- length is easily set by
reset timing. The delay length and the number of read delay clocks between write and read, is determined by
externally controlled write and read reset timings. The MS81V10160 uses a thin and small 70-pin plastic TSOP.
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Semiconductor
MS81V10160
FEATURES
•
•
•
•
•
•
•
•
•
664,320 words
×
16 bits
Fast FIFO (First-In First-Out) operation: 12 ns cycle time
Self refresh (No refresh control is required)
High speed asynchronous serial access
Read/Write Cycle Time
12 ns/15 ns
Access Time
9 ns/12 ns
Variable length delay bit (600 to 664,320)
Write mask function (Output enable control)
Cascading capability
Single power supply: 3.3 V ± 10%
Package:
70-pin plastic TSOP TYPE II (TSOP II 70-P-400-0.5-K) (Product name: MS81V10160-xxTA)
xx indicates speed rank.
Parameter
Access Time
Read/Write
Cycle Time
Operation current
Standby current
Symbol
tAC
tSWC
tSRC
Icc1
Icc2
MS81V10160-TA
–12
9 ns
12 ns
210 mA
6 mA
–15
12 ns
15 ns
170 mA
6 mA
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Semiconductor
MS81V10160
PIN CONFIGURATION (TOP VIEW)
V
CC
NC
NC
NC
V
SS
DI0
DI1
DI2
DI3
V
SS
DO0
DO1
V
CC
DO2
DO3
V
SS
V
SS
V
CC
V
CC
DO4
DO5
V
CC
DO6
DO7
V
SS
DI4
DI5
DI6
DI7
V
SS
OE
RE
RSTR
SRCK
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
V
SS
NC
NC
NC
V
CC
DI15
DI14
DI13
DI12
V
SS
DO15
DO14
V
CC
DO13
DO12
V
SS
V
SS
V
CC
V
CC
DO11
DO10
V
CC
DO9
DO8
V
SS
DI11
DI10
DI9
DI8
V
CC
IE
WE
RSTW
SWCK
V
SS
70-pin Plastic TSOP
SWCK
SRCK
WE
RE
IE
OE
RSTW
RSTR
DI0-15
DO0-15
V
SS
V
CC
NC
Serial Write Clock
Serial Read Clock
Write Enable
Read Enable
Input Enable
Output Enable
Reset Write
Reset Read
Data Input
Data Output
Ground (0 V)
Power Supply (3.3 V)
No Connection
Note: The same power supply voltage must be provided to every V
CC
pin, and the same GND voltage
level must be provided to every V
SS
pin.
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Semiconductor
MS81V10160
BLOCK DIAGRAM
DO (X16)
OE
RE
RSTR
SRCK
Data-output
Buffer
Serial
Read
Controller
Read Data Register
(X16)
664,320 x 16
Memory
Array
X
Decoder
Read/Write
Refresh
Timing Generater
(X16)
Write Data Register
Refresh
Counter
Data-input
Buffer
Serial
Write
Controller
DI (X16)
IE
WE
RSTW
SWCK
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嵌入式系统