Semiconductor
MSM5117400D
4,194,304-Word
×
4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
This version: Jun. 2000
DESCRIPTION
The MSM5117400D is a 4,194,304-word
×
4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS
technology. The MSM5117400D achieves high integration, high-speed operation, and low-power consumption
because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The
MSM5117400D is available in a 26/24-pin plastic SOJ, 26/24-pin plastic TSOP.
FEATURES
•
•
•
•
•
•
4,194,304-word
×
4-bit configuration
Single 5V power supply,
±10%
tolerance
Input
Output
Refresh
: TTL compatible, low input capacitance
: TTL compatible, 3-state
: 2048 cycles/32 ms
Fast page mode, read modify write capability
•
•
•
CAS before RAS refresh, hidden refresh, RAS-only refresh capability
Multi-bit test mode capability
Package options:
26/24-pin 300mil plastic SOJ
26/24-pin 300mil plastic TSOP
(SOJ26/24-P-300-1.27)
(TSOPII26/24-P-300-1.27-K)
(Product : MSM5117400D-xxSJ)
(Product : MSM5117400D-xxTS-K)
xx : indicates speed rank.
PRODUCT FAMILY
Family
MSM5117400D-50
MSM5117400D-60
MSM5117400D-70
Access Time (Max.)
t
RAC
50ns
60ns
70ns
t
AA
25ns
30ns
35ns
t
CAC
13ns
15ns
20ns
t
OEA
13ns
15ns
20ns
Cycle Time
(Min.)
90ns
110ns
130ns
Power Dissipation
Operating (Max.)
550mW
495mW
440mW
5.5mW
Standby (Max.)
1/14
MSM5117400D
PIN CONFIGRATION (TOP VIEW)
V
CC
DQ1
DQ2
WE
RAS
NC
1
2
3
4
5
6
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
DQ1
DQ2
WE
RAS
NC
1
2
3
4
5
6
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
A10 8
A0 9
A1 10
A2 11
A3 12
V
CC
13
A10 8
A0 9
A1 10
A2 11
A3 12
V
CC
13
26/24-Pin Plastic SOJ
26/24-Pin Plastic TSOP
(K Type)
Pin Name
A0–A10
RAS
CAS
DQ1–DQ4
OE
WE
V
CC
V
SS
NC
Function
Address Input
Row Address Strobe
Column Address Strobe
Data Input/Data Output
Output Enable
Write Enable
Power Supply (5V)
Ground (0V)
No Connection
2/14
MSM5117400D
BLOCK DIAGRAM
RAS
CAS
Timing
Generator
Timing
Generator
Write
Clock
Generator
4
Internal
Address
Counter
Row
Address
Buffers
Refresh
Control Clock
Sense Amplifiers
4
I/O
Selector
4
4
Input
Buffers
4
WE
OE
Output
Buffers
4
4
11
Column
Address
Buffers
11
Column Decoders
A0 – A10
DQ1 - DQ
4
11
11
Row
Deco-
ders
Word
Drivers
Memory
Cells
V
CC
On Chip
V
BB
Generator
V
SS
3/14
MSM5117400D
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage
on
Any Pin Relative to V
SS
Voltage V
CC
supply Relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
IN
, V
OUT
V
CC
I
OS
P
D*
T
opr
T
stg
*: Ta = 25°C
Rating
−0.5
to V
CC
+
0.5
0.5 to 7.0
50
1
0 to 70
−55
to 150
Unit
V
V
mA
W
°C
°C
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
Min.
4.5
0
2.4
−0.5
*2
Typ.
5.0
0
Max.
5.5
0
Unit
V
V
V
V
V
CC
V
SS
V
IH
V
IL
V
CC
+
0.5
*1
0.8
Notes:
*1. The input voltage is V
CC
+
2.0V when the pulse width is less than 20ns (the pulse width is with
respect to the point at which V
CC
is applied).
*2. The input voltage is V
SS
−
2.0V when the pulse width is less than 20ns (the pulse width respect to
the point at which V
SS
is applied).
Capacitance
(V
CC
= 5V ± 10%, Ta = 25°C, f=1MHz)
Parameter
Input Capacitance (A0 – A10)
Input Capacitance
(RAS, CAS, WE, OE)
Output Capacitance (DQ1 – DQ4)
Symbol
Typ.
Max.
5
7
7
Unit
pF
pF
pF
C
IN1
C
IN2
C
I/O
4/14
MSM5117400D
DC Characteristics
(V
CC
= 5V ± 10%, Ta = 0°C to 70°C)
MSM5117400 MSM5117400 MSM5117400
D-50
D-60
D-70
Unit
Min.
Output High Voltage
Output Low Voltage
Input Leakage
Current
Output Leakage
Current
Average Power
Supply Current
(Operating)
Power Supply
Current
(Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current
(Standby)
Average Power
Supply Current
(CAS before RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
V
OH
V
OL
I
OH
=
−5.0mA
I
OL
= 4.2mA
0V
≤
V
I
≤
6.5V ;
I
LI
All other pins not
under test = 0V
DQ disable
0V
≤
V
O
≤
V
CC
RAS, CAS cycling,
t
RC
= Min.
RAS, CAS = V
IH
I
CC2
RAS, CAS
≥
V
CC
– 0.2V
RAS cycling,
I
CC3
CAS = V
IH
,
t
RC
= Min.
RAS = V
IH
,
I
CC5
CAS = V
IL
,
DQ = enable
RAS = cycling,
CAS before RAS
RAS = V
IL
,
I
CC7
CAS cycling,
t
PC
= Min.
80
70
60
mA
1,3
5
5
5
mA
1
100
90
80
mA
1,2
−10
10
−10
10
−10
10
µA
2.4
0
Max
V
CC
0.4
Min.
2.4
0
Max
V
CC
0.4
Min.
2.4
0
Max
V
CC
0.4
V
V
Parameter
Symbol
Condition
Note
I
LO
−10
10
−10
10
−10
10
µA
I
CC1
100
90
80
mA
1,2
2
1
2
1
2
1
mA
1
I
CC6
100
90
80
mA
1,2
Notes: 1.
2.
3.
I
CC
Max. is specified as I
CC
for output open condition.
The address can be changed once or less while RAS = V
IL
.
The address can be changed once or less while CAS = V
IH
.
5/14
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