Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
E2L0036-17-Y1
¡ Semiconductor
¡ Semiconductor
MSM548332
278,400-Word
¥
12-Bit Field Memory
This version: Jan. 1998
MSM548332
Previous version: Dec. 1996
DESCRIPTION
The MSM548332 is a 3.3-Mbit, 960 bits
¥
290 lines, Field Memory. Access is done line by line. The line
address must be set each time a line is changed.
More than two MSM548332s can be cascaded directly without any delay devices between them.
Cascading MSM548332s provides larger capacity and longer delay.
X serial address input enables random initial address setting of serial access in a page. Other than the
random address setting, MSM548332 has several types of address set modes such as line hold,
address jump to initial address and line increment.
Self refresh function releases the MSM548332 from being applied external refresh control clocks even
though it contains dynamic type memory cells. MSM548332 has write mask function or input enable
function (IE), and read-data skipping function or output enable function (OE).
The MSM548332 is especially designed for digital TVs and VTRs for consumer use and video
cameras.
The MSM548332 is not designed for high end use in such applications as medical systems,
professional graphics systems which require long term picture storage, data storage systems and
others.
FEATURES
• 960
¥
290
¥
12-bit configuration
• Line by line access
• X serial address inputs for random serial initial bit address
• Asynchronous operation
• Serial read and write cycle times
Read cycle: 30 ns/50 ns
Write cycle: 30 ns/50 ns
• Low operating supply voltage: 3.3 V
±0.3
V
• Self-refresh
• Various address reset mode for picture processing
• Write mask function (Input enable control)
• Data skipping function (Output enable control)
• Package:
44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM548332-xxTS-K)
xx indicates speed rank.
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¡ Semiconductor
MSM548332
PIN CONFIGURATION (TOP VIEW)
V
SS
DIN5
DIN4
DIN3
DIN2
DIN1
DIN0
RCLK
RXAD
RADE/RX
RR
RXINC
RE
OE
DO0
DO1
V
CC
DO2
DO3
V
SS
DO4
DO5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44-Pin Plastic TSOP (II)
(K Type)
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
WCLK
WXAD
WADE/RX
WR/TR
WE
WXINC
IE
DO11
DO10
V
CC
DO9
DO8
V
SS
DO7
DO6
V
CC
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¡ Semiconductor
MSM548332
Pin Name
RCLK
RE
DO0 - 11
RR
RXINC
RADE/RX
RXAD
OE
WCLK
WE
DIN0 - 11
WR/TR
WXINC
WADE/RX
WXAD
IE
V
CC
V
SS
Function
Address Setting Cycle
Read Port, X Serial Address Strobes
—
—
Read Port, Address Reset Mode Enable
Read Port, X Address Increment
Read Port, X Address Input Enable
Read Port, X Address Reset
Read Port, X Serial Address Data
—
Write Port, X Serial Address Strobes
—
—
Write Port, Address Reset Mode Enable
Write Port, X Address Increment
Write Port, X Address Input Enable
Write Port, X Address Reset
Write Port, X Serial Address Data
—
Input Enable
Power Supply Voltage (3.3 V)
Ground (0 V)
Output Enable
Write Port, Serial Write Clock
Write Port, Write Enable
Write Port, Input Data
Write Port, Write Data Transfer
—
—
—
Serial Read/Write Cycle
Read Port, Serial Read Clock
Read Port, Read Enable
Read Port, Data Output
—
—
—
—
Note: Same power supply voltage level must be provided to every V
CC
pin.
Same ground voltage level must be provided to every V
SS
pin.
3/23
¡ Semiconductor
BLOCK DIAGRAM
WE
Refresh
Counter
WCLK
WADE/RX
WXAD
WR/TR
WXINC
WCLK
IE
12
Write Buffer
DIN0 to DIN11
Address Control
Write Register
Write
X-Address
Decoder
Memory
Controller
Memory Cell Array
960
¥
290
¥
12 bits
RCLK
RADE/RX
RXAD
RR
RXINC
Address Control
Read
Read Register
12
V
BB
Generator
RCLK
RE
OE
D
OUT
Buffer
DO0 to DO11
MSM548332
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