MX23L12814
128M-BIT MASK ROM
FEATURES
• Bit organization
- 16Mb x 8 (byte mode)
- 8Mb x 16 (word mode)
• Fast access time
- Random access:120/30ns(max.)
• Page size
- 8 words per page
• Current
- Operating:50mA
- Standby:15uA(max.)
• Supply voltage
- VCC : 2.7 ~ 3.6V
- VCCQ : 2.7 ~ 3.6V
• Package
- 56 pin TSOP(14mm x 20mm)
• Temperature
- -25~85°C
PIN DESCRIPTION
Symbol
A0~A23
D0~D15
OE#
BYTE#
VCC
VCCQ
GND
NC
Pin Function
Address Inputs, A0 not used in
word mode
Data Outputs
Output Enable Input
Word/Byte mode Selection
Power Supply Pin
Output VCC Pin
Ground Pin
No Connection
CE0#,CE1#,CE2# Chip Enable Input
PIN CONFIGURATION
56 Pin TSOP (Top View)
A22
CE1#
A21
A20
A19
A18
A17
A16
VCC
A15
A14
A13
A12
CE0#
NC
NC
A11
A10
A9
A8
GND
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
NC
OE#
NC
D15
D7
D14
D6
GND
D13
D5
D12
D4
VCCQ
GND
D11
D3
D10
D2
VCC
D9
D1
D8
D0
A0
BYTE#
A23
CE2#
MX23L12814
P/N:PM0779
REV. 2.6, JAN. 11, 2005
1
MX23L12814
MODE SELECTION
CE#
Disabled
Enabled
Enabled
Enabled
OE#
X
H
L
L
BYTE#
X
X
L
H
D0~D15
High Z
High Z
D0~D7
D0~D7
D8~D15
HighZ
HighZ
HighZ
D8~D15
Power
Stand-by
Active
Active
Active
CHIP ENABLE TRUTH TABLE
CE2#
L
L
L
L
H
H
H
H
CE1#
L
L
H
H
L
L
H
H
CE0#
L
H
L
H
L
H
L
H
DEVICE
Enabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Disabled
Note: For single-chip applications, CE2#, CE1# can be strapped to GND.
ORDER INFORMATION
Part No.
MX23L12814TC-12
MX23L12814TC-12G
MX23L12814TI-12
Speed
120ns
120ns
120ns
Package
56 pin TSOP
56 pin TSOP
56 pin TSOP
Grade
Commercial
Commercial
Industrial
Remark
Pb-free
Note: Industrial grade temperature: -25 ~ 85°C
Commercial grade temperature: 0 ~ 70°C
P/N:PM0779
REV. 2.6, JAN. 11, 2005
2
MX23L12814
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on any Pin Relative to VSS
Ambient Operating Temperature
Storage Temperature
Symbol
VIN
Topr
Tstg
Ratings
-0.3V to 3.9V
-25°C to 85°C
-65°C to 125°C
DC CHARACTERISTICS
(Ta = -25°C ~ 85°C, VCC = 2.7V~3.6V)
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (CMOS)
Input Capacitance
Output Capacitance
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC
ISTB
CIN
COUT
MIN.
2.4V
-
2.2V
-0.5V
-
-
-
-
-
-
MAX.
-
0.4V
VCCQ+0.5V
0.8V
5uA
5uA
50mA
15uA
10pF
10pF
0V, VCC
0V, VCC
f=5MHz, CE#=VIL, OE#=VIH
all output open
CE#>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
Conditions
IOH = -400uA
IOL = 1.6mA
AC CHARACTERISTICS
(Ta = -25°C ~ 85°C, VCC = 2.7V~3.6V)
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Page Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
Symbol
tRC
tAA
tACE
tPA
tOE
tOH
tHZ
23L12814-12
MIN.
120ns
-
-
-
-
0ns
-
MAX.
-
120ns
120ns
30ns
30ns
-
20ns
Note:Output high-impedance delay (tHZ) is measured from OE# or CE# going high, and this parameter guaranteed
by design over the full voltage and temperature operating range - not tested.
P/N:PM0779
REV. 2.6, JAN. 11, 2005
3
MX23L12814
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~2.4V
5ns
1.5V
1.5V
See Figure
100pF output load
capacitance
IOH (load)=-400uA
DOUT
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
TIMING DIAGRAM
RANDOM READ
ADD
Output loading capacitance includes load board's and all stray capacitance.
ADD
tACE
ADD
tRC
ADD
CE#
tOE
OE#
tAA
tOH
tHZ
DATA
VALID
VALID
VALID
PAGE READ
A4-A23
VALID ADD
A0,A1,A2,A3
1'st ADD
tAA
2'nd ADD
tPA
VALID
VALID
3'rd ADD
DATA
VALID
Note: CE#, OE# are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0779
REV. 2.6, JAN. 11, 2005
4
MX23L12814
PACKAGE INFORMATION
P/N:PM0779
REV. 2.6, JAN. 11, 2005
5
传感器
