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N74F38D,623

logic gates 2input nand buffr

器件类别:逻辑    逻辑   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
Brand Name
NXP Semiconduc
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
SOIC
包装说明
SOP,
针数
14
制造商包装代码
SOT108-1
Reach Compliance Code
compli
其他特性
IOL = 64MA @ VOL = 0.55V; IOH = 0.25MA @ VOH = 4.5V
系列
F/FAST
JESD-30 代码
R-PDSO-G14
JESD-609代码
e4
长度
8.65 mm
负载电容(CL)
50 pF
逻辑集成电路类型
NAND GATE
湿度敏感等级
1
功能数量
4
输入次数
2
端子数量
14
最高工作温度
70 °C
最低工作温度
输出特性
OPEN-COLLECTOR
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
最大电源电流(ICC)
30 mA
传播延迟(tpd)
5.5 ns
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
TTL
温度等级
COMMERCIAL
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
3.9 mm
Base Number Matches
1
文档预览
74F38
Quad 2-input NAND buffer (open collector)
Rev. 3 — 10 January 2014
Product data sheet
1. General description
The 74F38 provides four 2-input NAND functions with open-collector outputs.
2. Features and benefits
Industrial temperature range available (40C to +85
C)
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
N74F38N
I74F38N
N74F38D
I74F38D
0
C
to +70
C
40 C
to +85
C
0
C
to +70
C
40 C
to +85
C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
Name
DIP14
Description
plastic dual in-line package; 14 leads (300 mil)
Version
SOT27-1
Type number
NXP Semiconductors
74F38
Quad 2-input NAND buffer (open collector)
4. Functional diagram
1
2
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y
3
4
5
2Y
6
9
3Y
8
10
&
8
&
3
&
6
4Y
11
12
13
&
11
mna697
mna698
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
5. Pinning information
5.1 Pinning
74F38
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
aaa-010562
14 V
CC
13 4B
12 4A
11 4Y
10 3B
9
8
3A
3Y
Fig 3.
Pin configuration DIP14 and SO14 package
74F38
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 10 January 2014
2 of 12
NXP Semiconductors
74F38
Quad 2-input NAND buffer (open collector)
5.2 Pin description
Table 2.
Symbol
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
GND
V
CC
[1]
[2]
Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
Unit load
HIGH/LOW
1.0/2.0
1.0/2.0
OC/106.7
-
-
Load value
[1][2]
HIGH/LOW
20
A/1.2
mA
20
A/1.2
mA
OC/64 mA
-
-
One FAST Unit Load (UL) is defined as 20
A
in HIGH state, 0.6 mA in LOW state.
OC = open collector.
6. Functional description
Table 3.
Input
nA
L
L
H
H
[1]
Function table
[1]
Output
nB
L
H
L
H
nY
H
H
H
L
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
V
O
I
IK
I
O
T
amb
Parameter
supply voltage
input voltage
output voltage
input clamping current
output current
ambient temperature
output in HIGH-state
V
I
< 0 V
output in LOW-state
in free-air
commercial
industrial
T
stg
[1]
[2]
[2]
[1]
[1]
Conditions
Min
0.5
0.5
0.5
30
-
0
40
65
Max
+7.0
+7.0
V
CC
+5
128
70
+85
+150
Unit
V
V
V
mA
mA
C
C
C
storage temperature
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
74F38
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 10 January 2014
3 of 12
NXP Semiconductors
74F38
Quad 2-input NAND buffer (open collector)
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
IH
V
IL
V
OH
I
IK
I
OL
Recommended operating conditions
Parameter
supply voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
input clamping current
LOW-level output current
Conditions
Min
4.5
2.0
-
-
18
-
Typ
5.0
-
-
-
-
-
Max
5.5
-
0.8
4.5
-
64
Unit
V
V
V
V
mA
mA
9. Static characteristics
Table 6.
Static characteristics
Conditions
V
CC
= 4.5 V; I
IK
=
18
mA
V
CC
= 4.5 V; V
IL
= 0.8 V; V
IH
= 2.0 V
I
OL
= 64 mA
V
CC
=
10
%
V
CC
=
5
%
I
I
I
IH
I
IL
I
CC
input leakage current
HIGH-level input current
LOW-level input current
supply current
V
CC
= 0 V; V
I
= 7.0 V
V
CC
= 5.5 V; V
I
= 2.7 V
V
CC
= 5.5 V; V
I
= 0.5 V
V
CC
= 5.5 V
V
I
= GND
V
I
= 4.5 V
[1]
All typical values are measured at V
CC
= 5 V.
Symbol Parameter
V
IK
V
OL
input clamping voltage
LOW-level output
voltage
25
C
Min Typ
[1]
Max
1.2 0.73
-
0
C
to +70
C
Min
1.2
Max
-
Unit
V
-
-
-
-
-
-
-
-
0.42
-
-
-
4
22
-
-
-
-
-
-
-
-
-
-
-
20
-
-
0.55
0.55
100
20
-
7
30
V
V
A
A
A
mA
mA
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V. Test circuit is shown in
Figure 6.
Symbol Parameter
Conditions
25
C;
V
CC
= 5.0 V
Min
t
PZL
t
PLZ
OFF-state to LOW
propagation delay
LOW to OFF-state
propagation delay
nA, nB to nY;
see
Figure 4
nA, nB to nY;
see
Figure 4
1.5
7.5
Typ
3.0
10.0
Max
5.0
12.5
0
C
to +70
C;
V
CC
= 5.0 V
0.5 V
Min
1.5
7.5
Max
5.5
13.0
40 C
to +85
C;
V
CC
= 5.0 V
0.5 V
Min
1.5
7.5
Max
6.0
14.5
ns
ns
Unit
74F38
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 10 January 2014
4 of 12
NXP Semiconductors
74F38
Quad 2-input NAND buffer (open collector)
11. Waveforms
V
I
nA, nB input
GND
t
PLZ
V
CC
nY output
V
OL
aaa-010563
V
M
t
PZL
V
M
V
M
V
M
= 1.5 V
VOL is a typical output voltage level that occurs with the output load.
Fig 4.
Propagation delay for inverting outputs
18
Propagation
delay
(ns)
14
12
10
8
6
4
aaa-010521
t
PLZ
t
PZL
2
0
0
200
400
600
Load resistor (Ω)
When using open collector parts, the value of the pull-up resistor greatly affects the value of the t
PLZ
. For example, changing the
specified pull-up resistor value from 500
to 100
improves the t
PLZ
up to 50% with only a slight increase in the t
PZL
.
However, if the value of the pull-up resistor is changed, the user must ensure that the total I
OL
current through the resistor and
the total I
IL
of the receivers, does not exceed the I
OL
minimum specification.
Fig 5.
Typical propagation delays versus load for open collector outputs
74F38
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 10 January 2014
5 of 12
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参数对比
与N74F38D,623相近的元器件有:N74F38D,602。描述及对比如下:
型号 N74F38D,623 N74F38D,602
描述 logic gates 2input nand buffr logic gates 2-IN nand buffer
Brand Name NXP Semiconduc NXP Semiconduc
是否Rohs认证 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦)
零件包装代码 SOIC SOIC
包装说明 SOP, SOP, SOP14,.25
针数 14 14
制造商包装代码 SOT108-1 SOT108-1
Reach Compliance Code compli compli
其他特性 IOL = 64MA @ VOL = 0.55V; IOH = 0.25MA @ VOH = 4.5V IOL = 64MA @ VOL = 0.55V; IOH = 0.25MA @ VOH = 4.5V
系列 F/FAST F/FAST
JESD-30 代码 R-PDSO-G14 R-PDSO-G14
JESD-609代码 e4 e4
长度 8.65 mm 8.65 mm
负载电容(CL) 50 pF 50 pF
逻辑集成电路类型 NAND GATE NAND GATE
湿度敏感等级 1 1
功能数量 4 4
输入次数 2 2
端子数量 14 14
最高工作温度 70 °C 70 °C
输出特性 OPEN-COLLECTOR OPEN-COLLECTOR
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP SOP
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE
峰值回流温度(摄氏度) 260 260
最大电源电流(ICC) 30 mA 30 mA
传播延迟(tpd) 5.5 ns 5.5 ns
认证状态 Not Qualified Not Qualified
座面最大高度 1.75 mm 1.75 mm
最大供电电压 (Vsup) 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V
表面贴装 YES YES
技术 TTL TTL
温度等级 COMMERCIAL COMMERCIAL
端子面层 Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD
端子形式 GULL WING GULL WING
端子节距 1.27 mm 1.27 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 30 30
宽度 3.9 mm 3.9 mm
Base Number Matches 1 1
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