NCP1589A, NCP1589B
Low Voltage Synchronous
Buck Controller
The NCP1589A/B is a low cost PWM controller designed to operate
from a 5 V or 12 V supply. This device is capable of producing an
output voltage as low as 0.8 V. This device is capable of converting
voltage from as low as 2.5 V. This 10−pin device provides an optimal
level of integration to reduce size and cost of the power supply.
Features include a 1.5 A gate driver design and an internally set
300 kHz or 600 kHz oscillator. In addition to the 1.5 A gate drive
capability, other efficiency enhancing features of the gate driver
include adaptive non−overlap circuitry. The NCP1589A/B also
incorporates an externally compensated error amplifier. Protection
features include programmable short circuit protection and
undervoltage lockout (UVLO).
Features
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MARKING DIAGRAM
1589x
ALYWG
G
= Specific Device Code
x = A or B
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Device
DFN10
CASE 485C
1589x
A
L
Y
W
G
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
V
CC
Range from 4.5 V to 13.2 V
300 kHz and 600 kHz Internal Oscillator
Boost Pin Operates to 30 V
Voltage Mode PWM Control
Precision 0.8 V Internal Reference
Adjustable Output Voltage
Internal 1.5 A Gate Drivers
80% Max Duty Cycle
Input Under Voltage Lockout
Programmable Current Limit
This is a Pb−Free Device
(Note: Microdot may be in either location)
PIN CONNECTIONS
BOOT
LX
UG
LG
GND
1
2
3
4
5
(Top View)
10
9
8
7
6
PGOOD
VOS
FB
COMP/DISB
V
CC
Applications
Graphics Cards
Desktop Computers
Servers / Networking
DSP & FPGA Power Supply
DC−DC Regulator Modules
ORDERING INFORMATION
Device
NCP1589AMNTWG
NCP1589BMNTWG
NCP1589AMNTXG
NCP1589BMNTXG
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DFN10
(Pb−Free)
3000 /
Tape & Reel
Package
Shipping
†
©
Semiconductor Components Industries, LLC, 2017
1
January, 2017 − Rev. 2
Publication Order Number:
NCP1589A/D
NCP1589A, NCP1589B
V
CC
= 4.5 V − 13.2 V
V
BST
= 4.5 V − 15 V
V
IN
= 2.5 V − 20 V
3x22mF
1500mF
1mF
1500mF
2x0.22mF
VCC
0.1mF
COMP/DISB
C1
0.0015mF
R2
17.08kW
C2
0.007mF
FB
GND
R4
3.878kW
R1
4.12kW
C3
0.014mF
1.02k
R3
74.2W
R9
R10
1.02k
UG
NTD4809
PGOOD
BOOT
LX
NTD4806
LG
VOS
ROCSET
2.2
1mH
VOUT
1.65 V
2x1800mF
4.7nF
GND
Figure 1. Typical Application Diagram
PGOOD
10
VOS 9
PGOOD
MONITOR
OV and UV
0.8 V
(V
ref
)
±10%
of V
ref
±25%
of V
ref
POR
UVLO
6
VCC
FAULT
LATCH
+
−
FAULT
VOCP
FB
8
−
+
0.8 V
(V
ref
)
1
+
−
BOOT
UG
R
PWM
OUT
Q
3
S
2
+
CLOCK
RAMP
SOFT
START
−
2V
+
−
VCC
4
LX
COMP/DISB
7
OSC
LG
OSC
FAULT
5
GND
Figure 2. Detailed Block Diagram
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2
NCP1589A, NCP1589B
PIN FUNCTION DESCRIPTION
Pin No.
1
Symbol
BOOT
Description
Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring the desired
input voltage to this pin (cathode connected to BOOT pin). Connect a capacitor (C
BOOT
) between this pin
and the LX pin. Typical values for C
BOOT
range from 0.1
mF
to 1
mF.
Ensure that C
BOOT
is placed near the
IC.
Switch node pin. This is the reference for the floating top gate driver. Connect this pin to the source of the
top MOSFET.
Top gate MOSFET driver pin. Connect this pin to the gate of the top N−channel MOSFET.
Bottom gate MOSFET driver pin. Connect this pin to the gate of the bottom N−channel MOSFET.
IC ground reference. All control circuits are referenced to this pin.
Supply rail for the internal circuitry. Operating supply range is 4.5 V to 13.2 V. Decouple with a 1
mF
capaci-
tor to GND. Ensure that this decoupling capacitor is placed near the IC.
Compensation Pin. This is the output of the error amplifier (EA) and the non−inverting input of the PWM
comparator. Use this pin in conjunction with the FB pin to compensate the voltage−control feedback loop.
Pull this pin low for disable.
This pin is the inverting input to the error amplifier. Use this pin in conjunction with the COMP pin to com-
pensate the voltage−control feedback loop. Connect this pin to the output resistor divider (if used) or directly
to V
out
.
Voltage Offset Sense
Power Good output. Pulled Low if VOS is
±10%
of 0.8 V V
ref
.
2
3
4
5
6
7
LX
UG
LG
GND
VCC
COMP/DISB
8
FB
9
10
VOS
PGOOD
ABSOLUTE MAXIMUM RATINGS
Pin Name
Main Supply Voltage Input
Bootstrap Supply Voltage Input
Symbol
VCC
BOOT
V
MAX
15 V
35 V wrt/GND
40 V < 100 ns
15 V wrt/LX
35 V
40 V for < 100 ns
30 V wrt/GND
15 V wrt/LX
40 V for < 100 ns
V
CC
+ 0.3 V
5.0 V
3.6 V
7V
V
MIN
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−5 V
−10 V for < 200 ns
−0.3 V wrt/LX
−2 V for < 200 ns
−0.3 V
−5 V for < 200 ns
−0.3 V
−0.3 V
−0.3 V
Switching Node (Bootstrap Supply Return)
High−Side Driver Output (Top Gate)
LX
UG
Low−Side Driver Output (Bottom Gate)
Feedback, VOS
COMP/DISB
PGOOD
LG
FB, VOS
COMP/DISB
PGOOD
MAXIMUM RATINGS
Rating
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Operating Junction Temperature Range
Operating Ambient Temperature Range
Storage Temperature Range
Moisture Sensitivity Level
Symbol
R
qJA
R
qJC
T
J
T
A
T
stg
MSL
Value
165
45
0 to 150
0 to 70
−55 to +150
1
Unit
°C/W
°C/W
°C
°C
°C
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
This device is ESD sensitive. Use standard ESD precautions when handling.
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3
NCP1589A, NCP1589B
ELECTRICAL CHARACTERISTICS
(0°C < T
A
< 70°C; 4.5 V < [BST−PHASE] < 13.2 V, 4.5 V < BST < 30 V, 0 V < PHASE < 21 V,
C
TG
= C
BG
= 1.0 nF, for min/max values unless otherwise noted.)
Characteristic
VCC Voltage Range
Boost Voltage Range
13.2 V wrt LX
Conditions
Min
4.5
4.5
Typ
Max
13.2
30
Unit
V
V
Supply Current
Quiescent Supply Current (NCP1589A)
Boost Quiescent Current
V
FB
= 1.0 V, No Switching, V
CC
= 13.2 V
V
FB
= 1.0 V, No Switching
V
CC
Rising
V
CC
Falling
V
CC
Rising or V
CC
Falling
(FB Tied to Comp. Measure FB Pin.)
0.7936
270
540
1.0
0.1
8.0
mA
mA
4.0
3.6
0.4
4.2
3.8
V
V
V
Undervoltage Lockout
UVLO Threshold
UVLO Threshold
UVLO Hysteresis
3.8
3.4
Switching Regulator
VFB Feedback Voltage
Oscillator Frequency (NCP1589A)
Oscillator Frequency (NCP1589B)
Ramp−Amplitude Voltage
Minimum Duty Cycle
Maximum Duty Cycle
LG Minimum on Time
70
0.8
300
600
1.1
0
75
500
80
0.8064
330
660
V
kHz
kHz
V
%
%
ns
Error Amplifier
Open Loop DC Gain (Note 1)
Output Source Current
Output Sink Current
Input Offset Voltage (Note 1)
Input Bias Current
Unity Gain Bandwidth (Note 1)
Disable Threshold
Output Source Current During Disable
15
0.6
0.8
10
40
V
fb
< 0.8 V
V
fb
> 0.8 V
70
2.0
2.0
−2.0
0
0.1
2.0
1.0
80
dB
mA
mV
mA
Mhz
V
mA
A
1.4
1.5
V
CC
= 12 V
V
CC
= 12 V, UG−LX < 2.0 V, LG > 2.0 V
V
CC
= 12 V, LG < 2.0 V, UG > 2.0 V
12.4
12.4
1.0
18
18
W
A
W
ns
ns
Gate Drivers
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
UG Falling to LG Rising Delay
LG Falling to UG Rising Delay
V
CC
= 5 V, VUG − VLX = 2.5 V
1.5
Soft−Start
Soft−Start time
3.0
7.0
ms
Power Good
Output Voltage
OVP Threshold to PGOOD Output Low
OVP Threshold to Part Disable
UVP Threshold to PGOOD Output Low
UVP Threshold to Part Disable
Logic Low, Sinking 4 mA
Ramp VOS from 0.7 to 1.2.
Monitor when PGOOD goes Low
Ramp VOS from 0.8 to 1.2.
Monitor when outputs disable
Ramp VOS from 800 mV to 500 mV.
Monitor when PGOOD goes Low
Ramp VOS from 800 mV to 500 mV.
Monitor when utputs stop switching
0.65
0.5
0.88
1.0
0.72
0.6
0.4
1.0
1.2
V
V
V
V
V
Overcurrent Protection
OC Current Source (Note 1)
Sourced from LG pin, before SS
9.0
10
11
mA
1. Guaranteed by design but not tested in production.
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4
NCP1589A, NCP1589B
TYPICAL CHARACTERISTICS
303
V
CC
= 12 V
F
SW
, FREQUENCY (kHz)
302
V
CC
= 5 V
V
ref
, REFERENCE (mV)
808
806
804
802
800
798
796
794
299
0
10
20
30
40
50
60
70
T
J
, JUNCTION TEMPERATURE (°C)
792
0
20
40
60
80
T
J
, JUNCTION TEMPERATURE (°C)
301
300
Figure 3. Oscillator Frequency (F
SW
) vs.
Temperature
5.3
NCP1589B
OCP THRESHOLD (mV)
5.0
4.7
I
CC
(mA)
NCP1589A
4.4
4.1
3.8
3.5
0
539
0
542
543
Figure 4. Reference Voltage (V
ref
) vs.
Temperature
541
540
20
40
60
80
20
40
60
80
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. I
CC
vs. Temperature
Figure 6. OCP Threshold at 55k vs. Temperature
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5
