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NM27P040Q170

4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM

器件类别：存储    存储   

厂商名称：National Semiconductor（TI ）

厂商官网：http://www.ti.com

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参数 预览 参数对比
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
National Semiconductor（TI ）
包装说明
WDIP, DIP32,.6
Reach Compliance Code
unknow
ECCN代码
EAR99
最长访问时间
170 ns
I/O 类型
COMMON
JESD-30 代码
R-GDIP-T32
JESD-609代码
e0
内存密度
4194304 bi
内存集成电路类型
UVPROM
内存宽度
8
功能数量
1
端子数量
32
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
512KX8
输出特性
3-STATE
封装主体材料
CERAMIC, GLASS-SEALED
封装代码
WDIP
封装等效代码
DIP32,.6
封装形状
RECTANGULAR
封装形式
IN-LINE, WINDOW
并行/串行
PARALLEL
峰值回流温度（摄氏度）
NOT SPECIFIED
电源
5 V
认证状态
Not Qualified
座面最大高度
5.72 mm
最大待机电流
0.0001 A
最大压摆率
0.05 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
15.24 mm
文档预览
NM27P040 4 194 304-Bit (512K x 8) Processor Oriented CMOS EPROM
December 1993
NM27P040
4 194 304-Bit (512K x 8) Processor Oriented
CMOS EPROM
General Description
The NM27P040 is a 4096K Processor Oriented EPROM
(POP
TM
) configured as 512K x 8 It’s designed to simplify
microprocessor interfacing while remaining compatible with
standard EPROMs It can reduce both wait states and glue
logic when the specification improvements are taken advan-
tage of in the system design The NM27P040 is implement-
ed in National’s advanced CMOS EPROM process to pro-
vide a reliable solution and access times as fast as 120 ns
The interface improvements address two areas to eliminate
the need for additional devices to adapt the EPROM to the
microprocessor and to eliminate wait states at the termina-
tion of the access cycle Even with these improvements the
NM27P040 remains compatible with industry standard
JEDEC pinout EPROMs The time from CE or OE being
negated until the outputs are guaranteed to be in the high
impedance state has been reduced to eliminate the need
for wait states at the termination of the memory cycle and
the data-out hold time has been extended to eliminate the
need to provide data hold time for the microprocessor by
delaying control signals or latching and holding the data in
external latches
Features
Y
Y
Y
Y
Y
Fast output turn off to eliminate wait states
Extended data hold time for microprocessor
compatibility
High performance CMOS
120 ns access time
JEDEC standard pin configuration
Manufacturer’s identification code
Block Diagram
TL D 11367 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
POP
TM
is a trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL D 11367
RRD-B30M105 Printed in U S A
Connection Diagrams
27C080
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O
0
O
1
O
2
GND
27C020
XX V
PP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O
0
O
1
O
2
GND
27C010
XX V
PP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O
0
O
1
O
2
GND
TL D 11367 – 2
DIP
NM27P040
27C010
V
CC
XX PGM
XX
A14
A13
A8
A9
A11
OE
A10
CE
O
7
O
6
O
5
O
4
O
3
27C020
V
CC
XX PGM
A17
A14
A13
A8
A9
A11
OE
A10
CE
O
7
O
6
O
5
O
4
O
3
27C080
V
CC
A18
A17
A14
A13
A8
A9
A11
OE V
PP
A10
CE PGM
O
7
O
6
O
5
O
4
O
3
Note
Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27P040 pin
Commercial Temperature Range (0 C to
a
70 C)
V
CC
e
5V
g
10%
Parameter Order Number
NM27P040 Q 120
NM27P040 Q 150
NM27P040 Q 170
Access Time (ns)
120
150
170
Extended Temperature Range (
b
40 C to
a
85 C)
V
CC
e
5V
g
10%
Parameter Order Number
NM27P040 QE 150
NM27P040 QE 170
Access Time (ns)
150
170
Military Temperature Range (
b
55 C to
a
125 C)
V
CC
e
5V
g
10%
Parameter Order Number
NM27P040 QM 150
NM27P040 QM 200
Pin Names
A0–A18
CE PGM
OE
O0–O7
XX
Addresses
Chip Enable Program
Output Enable
Outputs
Don’t Care (During Read)
Access Time (ns)
150
200
Package Types NM27P040 QXXX
Q
e
Quartz-Windowed Ceramic DIP

All packages conform to the JEDEC standard

All versions are guaranteed to function for slower
speeds
2
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
All Input Voltages except A9 with
Respect to Ground (Note 10)
V
PP
and A9 with Respect to Ground
V
CC
Supply Voltage with
Respect to Ground
b
65 C to
a
150 C
b
0 6V to
a
7V
b
0 6V to
a
14V
b
0 6V to
a
7V
Operating Range
Range
Commercial
Industrial
Military
Temperature
0 C to
a
70 C
b
40 C to
a
85 C
b
55 C to
a
125 C
V
CC
a
5V
g
5V
g
5V
Tolerance
g
10%
g
10%
g
10%
l
2000V
ESD Protection
All Output Voltages with
Respect to Ground (Note 10) V
CC
a
1 0V to GND
b
0 6V
Read Operation
DC Electrical Characteristics
Over operating range with V
PP
e
V
CC
Symbol
V
IL
V
IH
V
OL
V
OH
I
SB1
I
SB2
I
CC
I
PP
V
PP
I
LI
I
LO
Parameter
Input Low Level
Input High Level
Output Low Voltage
Output High Voltage
V
CC
Standby Current (CMOS)
(Note 11)
V
CC
Standby Current
V
CC
Active Current
V
PP
Supply Current
V
PP
Read Voltage
Input Load Current
Output Leakage Current
V
IN
e
5 5V or GND
V
OUT
e
5 5V or GND
I
OL
e
2 1 mA
I
OH
e b
2 5 mA
CE
e
V
CC
g
0 3V
CE
e
V
IH
CE
e
OE
e
V
IL
I O
e
0 mA
f
e
5 MHz
V
PP
e
V
CC
V
CC
b
0 4
b
1
b
10
Test Conditions
Min
b
0 2
Max
08
V
CC
a
1
04
Units
V
V
V
V
20
35
100
1
30
10
V
CC
1
10
mA
mA
mA
mA
V
mA
mA
AC Electrical Characteristics
Over operating range with V
PP
e
V
CC
Symbol
t
ACC
t
CE
t
OE
t
DF
(Note 2)
t
CF
(Note 2)
t
OH
(Note 2)
Parameter
Min
Address to Output Delay
CE to Output Delay
OE to Output Delay
Output Disable to
Output Float
Chip Disable to
Output Float
Output Hold from Addresses CE or OE
Whichever Occurred First
7
120
Max
120
120
50
35
35
Min
150
Max
150
150
50
25
30
7
7
Min
170
Max
170
170
50
25
30
7
Min
250
Max
250
250
50
25
30
ns
Units
3
Capacitance
T
A
e a
25 C
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
f
e
1 MHz (Note 2)
Conditions
V
IN
e
0V
V
OUT
e
0V
Typ
9
12
Max
15
15
Units
pF
pF
AC Test Conditions
Output Load
Input Rise and Fall Times
Input Pulse Levels
1 TTL Gate and
C
L
e
100 pF (Note 8)
s
5 ns
0 45V to 2 4V
Timing Measurement Reference Level
Inputs
Outputs
0 8V and 2V
0 8V and 2V
AC Waveforms
(Notes 6
7 and 9)
TL D 11367 – 3
Note 1
Stresses above those listed under ‘‘Absolute Maximum Ratings’’ may cause permanent damage to the device This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied Exposure to absolute
maximum rating conditions for extended periods may affect device reliability
Note 2
This parameter is only sampled and is not 100% tested
Note 3
OE may be delayed up to t
ACC
b
t
OE
after the falling edge of CE without impacting t
ACC
Note 4
The t
DF
and t
CF
compare level is determined as follows
High to TRI-STATE the measured V
OH1
(DC)
b
0 10V
Low to TRI-STATE the measured V
OL1
(DC)
a
0 10V
Note 5
TRI-STATE may be attained using OE or CE
Note 6
The power switching characteristics of EPROMs require careful device decoupling It is recommended that at least a 0 1
mF
ceramic capacitor be used on
every device between V
CC
and GND
Note 7
The outputs must be restricted to V
CC
a
1 0V to avoid latch-up and device damage
Note 8
1 TTL Gate I
OL
e
1 6 mA I
OH
e b
400
mA
C
L
100 pF includes fixture capacitance
Note 9
V
PP
may be connected to V
CC
except during programming
Note 10
Inputs and outputs can undershoot to
b
2 0V for 20 ns Max
Note 11
CMOS input V
IL
e
GND
g
0 3V V
IH
e
V
CC
g
0 3V
4
Programming Waveform
(Note 3)
TL D 11367 – 4
5
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参数对比
与NM27P040Q170相近的元器件有：NM27P040Q120、NM27P040Q150、NM27P040QE150、NM27P040QE170、NM27P040QM150、NM27P040QM200、NM27P040QXXX、NM27P040。描述及对比如下：
型号 NM27P040Q170 NM27P040Q120 NM27P040Q150 NM27P040QE150 NM27P040QE170 NM27P040QM150 NM27P040QM200 NM27P040QXXX NM27P040
描述 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM IC 512K X 8 UVPROM, 170 ns, CDIP32, WINDOWED, CERAMIC, DIP-32, Programmable ROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM
是否Rohs认证 不符合 不符合 不符合 不符合 - 不符合 不符合 - -
包装说明 WDIP, DIP32,.6 WDIP, DIP32,.6 WDIP, DIP32,.6 WDIP, DIP32,.6 - WDIP, DIP32,.6 WDIP, DIP32,.6 - -
Reach Compliance Code unknow unknow unknow unknow - unknow unknow - -
ECCN代码 EAR99 EAR99 EAR99 EAR99 - EAR99 EAR99 - -
最长访问时间 170 ns 120 ns 150 ns 150 ns - 150 ns 200 ns - -
I/O 类型 COMMON COMMON COMMON COMMON - COMMON COMMON - -
JESD-30 代码 R-GDIP-T32 R-GDIP-T32 R-GDIP-T32 R-GDIP-T32 - R-GDIP-T32 R-GDIP-T32 - -
JESD-609代码 e0 e0 e0 e0 - e0 e0 - -
内存密度 4194304 bi 4194304 bi 4194304 bi 4194304 bi - 4194304 bi 4194304 bi - -
内存集成电路类型 UVPROM UVPROM UVPROM UVPROM - UVPROM UVPROM - -
内存宽度 8 8 8 8 - 8 8 - -
功能数量 1 1 1 1 - 1 1 - -
端子数量 32 32 32 32 - 32 32 - -
字数 524288 words 524288 words 524288 words 524288 words - 524288 words 524288 words - -
字数代码 512000 512000 512000 512000 - 512000 512000 - -
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS - ASYNCHRONOUS ASYNCHRONOUS - -
最高工作温度 70 °C 70 °C 70 °C 85 °C - 125 °C 125 °C - -
组织 512KX8 512KX8 512KX8 512KX8 - 512KX8 512KX8 - -
输出特性 3-STATE 3-STATE 3-STATE 3-STATE - 3-STATE 3-STATE - -
封装主体材料 CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED - CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED - -
封装代码 WDIP WDIP WDIP WDIP - WDIP WDIP - -
封装等效代码 DIP32,.6 DIP32,.6 DIP32,.6 DIP32,.6 - DIP32,.6 DIP32,.6 - -
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR - -
封装形式 IN-LINE, WINDOW IN-LINE, WINDOW IN-LINE, WINDOW IN-LINE, WINDOW - IN-LINE, WINDOW IN-LINE, WINDOW - -
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL - PARALLEL PARALLEL - -
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED - -
电源 5 V 5 V 5 V 5 V - 5 V 5 V - -
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified - -
座面最大高度 5.72 mm 5.72 mm 5.72 mm 5.72 mm - 5.72 mm 5.72 mm - -
最大待机电流 0.0001 A 0.0001 A 0.0001 A 0.0001 A - 0.0001 A 0.0001 A - -
最大压摆率 0.05 mA 0.03 mA 0.05 mA 0.05 mA - 0.03 mA 0.05 mA - -
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V - 5.5 V 5.5 V - -
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V - 4.5 V 4.5 V - -
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V - 5 V 5 V - -
表面贴装 NO NO NO NO - NO NO - -
技术 CMOS CMOS CMOS CMOS - CMOS CMOS - -
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL - MILITARY MILITARY - -
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - -
端子形式 THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE - THROUGH-HOLE THROUGH-HOLE - -
端子节距 2.54 mm 2.54 mm 2.54 mm 2.54 mm - 2.54 mm 2.54 mm - -
端子位置 DUAL DUAL DUAL DUAL - DUAL DUAL - -
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED - -
宽度 15.24 mm 15.24 mm 15.24 mm 15.24 mm - 15.24 mm 15.24 mm - -
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