Dual Very Low Noise Precision
Operational Amplifier
OP270
FEATURES
Very low noise density of 5 nV/√Hz at 1 kHz maximum
Excellent input offset voltage of 75 μV maximum
Low offset voltage drift of 1 μV/°C maximum
Very high gain of 1500 V/mV minimum
Outstanding CMR of 106 dB minimum
Slew rate of 2.4 V/μs typical
Gain bandwidth product of 5 MHz typical
Industry-standard 8-lead dual pinout
FUNCTIONAL BLOCK DIAGRAMS
–IN A
+IN A
V–
+IN B
–IN B
1
2
16
OUT A
15
NC
14
NC
NC
3
4
OP270
13
V+
12
NC
11
NC
10
OUT B
00325-001
00325-002
NC
5
6
7
NC
8
9
NC
NC = NO CONNECT
Figure 1. 16-Lead SOIC
(S-Suffix)
OUT A
–IN A
+IN A
V–
1
2
3
4
8
V+
OUT B
–IN B
+IN B
A
B
7
6
OP270
5
Figure 2. 8-Lead PDIP (P-Suffix)
8-Lead CERDIP
(Z-Suffix)
GENERAL DESCRIPTION
The OP270 is a high performance, monolithic, dual operational
amplifier with exceptionally low voltage noise density (5 nV/√Hz
maximum at 1 kHz). It offers comparable performance to the
industry-standard
OP27
from Analog Devices, Inc.
The OP270 features an input offset voltage of less than 75 μV
and an offset drift of less than 1 μV/°C, guaranteed over the full
military temperature range. Open-loop gain of the OP270 is more
than 1,500,000 into a 10 kΩ load, ensuring excellent gain accuracy
and linearity, even in high gain applications. The input bias
current is less than 20 nA, which reduces errors due to signal
source resistance. With a common-mode rejection (CMR) of
greater than 106 dB and a power supply rejection ratio (PSRR)
of less than 3.2 μV/V, the OP270 significantly reduces errors
due to ground noise and power supply fluctuations. The power
consumption of the dual OP270 is one-third less than two OP27
devices, a significant advantage for power conscious applications.
The OP270 is unity-gain stable with a gain bandwidth product
of 5 MHz and a slew rate of 2.4 V/μs.
The OP270 offers excellent amplifier matching, which is
important for applications such as multiple gain blocks, low
noise instrumentation amplifiers, dual buffers, and low noise
active filters.
The OP270 conforms to the industry-standard 8-lead DIP
pinout. It is pin compatible with the MC1458, SE5532/A,
RM4558, and HA5102 dual op amps, and can be used to
upgrade systems using those devices.
For higher speed applications, the
ADA4004-2
or the
AD8676
are
recommended. For a quad op amp, see the
OP470
data sheet.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2010 Analog Devices, Inc. All rights reserved.
OP270
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications ............................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Test Circuits ..................................................................................... 11
Applications Information .............................................................. 12
Voltage and Current Noise ........................................................ 12
Total Noise and Source Resistance ........................................... 12
Noise Measurements .................................................................. 14
Capacitive Load Driving and Power Supply Considerations .. 15
Unity-Gain Buffer Applications ............................................... 15
Low Phase Error Amplifier ....................................................... 16
Five-Band, Low Noise, Stereo Graphic Equalizer .................. 16
Digital Panning Control ............................................................ 17
Dual Programmable Gain Amplifier ....................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
2/10—Rev. D to Rev. E
Change to General Description Section ........................................ 1
Change to Input Noise Current Density Parameter, Table 1 ...... 3
Change to Figure 18 ......................................................................... 8
Changes to Total Noise and Source Resistance Section ............ 13
Changes to Figure 41 ...................................................................... 16
2/09—Rev. C to Rev. D
Updated Format .................................................................. Universal
Reorganized Layout ............................................................ Universal
Changes to Figure 7 .......................................................................... 6
Changes to Figure 22 ........................................................................ 9
Deleted Applications Heading ...................................................... 11
Changes to Figure 44 ...................................................................... 17
Changes to Figure 46 ...................................................................... 18
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
4/03—Rev. B to Rev. C
Deletion of OP270A model ............................................... Universal
Edits to Features.................................................................................1
Changes to Specifications .................................................................2
Deletion of Wafer Limits and Dice Characteristics ......................4
Changes to Absolute Maximum Ratings ........................................4
Changes to Ordering Guide .............................................................4
Changes to Equations in Noise Measurements section............. 10
Change to Figure 10 ....................................................................... 11
Updated Outline Dimensions ....................................................... 14
11/02—Rev. A to Rev. B
Updated Ordering Guide .............................................................. 15
9/02—Rev. 0 to Rev. A
Edits to Absolute Maximum Ratings ..............................................5
Edits to Ordering Guide ................................................................ 15
2/01—Revision 0: Initial Version
Rev. E | Page 2 of 20
OP270
SPECIFICATIONS
V
S
= ±15 V, T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage
1
Input Noise Voltage Density
2
Symbol
V
OS
I
OS
I
B
e
n
p-p
e
n
e
n
e
n
i
n
i
n
i
n
A
VO
Test Conditions
V
CM
= 0 V
V
CM
= 0 V
0.1 Hz to 10 Hz
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
V
O
= ±10 V,
R
L
= 10 kΩ
V
O
= ±10 V,
R
L
= 2 kΩ
R
L
≥ 2 kΩ
V
CM
= ±11 V
V
S
= ±4.5 V
to ±18 V
No load
OP270E
Min
Typ
10
1
5
80
3.6
3.2
3.2
1.1
0.7
0.6
1500 2300
750
±12
±12
106
1200
±12.5
±13.5
125
0.56
2.4
4
5
175
3
0.4
20
5
Max
75
10
20
200
6.5
5.5
5.0
OP270F
Min
Typ
20
3
10
80
3.6
3.2
3.2
1.1
0.7
0.6
1000 1700
500
±12
±12
100
3.2
1.7
6.5
900
±12.5
±13.5
120
1.0
2.4
4
5
175
3
0.4
20
5
Max
150
15
40
200
6.5
5.5
5.0
OP270G
Min Typ
50
5
15
80
3.6
3.2
3.2
1.1
0.7
0.6
750 1500
350
±12
±12
90
5.6
1.7
6.5
700
±12.5
±13.5
110
1.5
2.4
4
5
175
3
0.4
20
5
Max
250
20
60
Unit
μV
nA
nA
nV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
pA/√Hz
V/mV
V/mV
V
V
dB
μV/V
V/μs
mA
MHz
dB
pF
MΩ
GΩ
μs
Input Noise Current Density
Large-Signal Voltage Gain
Input Voltage Range
3
Output Voltage Swing
Common-Mode Rejection
Power Supply Rejection
Ratio
Slew Rate
Supply Current
(All Amplifiers)
Gain Bandwidth Product
Channel Separation
1
Input Capacitance
Input Resistance
Differential Mode
Common Mode
Settling Time
1
2
IVR
V
O
CMR
PSRR
SR
I
SY
GBP
CS
C
IN
R
IN
R
INCM
t
S
5.6
1.7
6.5
V
O
= ±20 V p-p,
f
O
= 10 Hz
125
125
A
V
= +1, 10 V,
step to 0.01%
Guaranteed but not 100% tested.
Sample tested.
3
Guaranteed by CMR test.
Rev. E | Page 3 of 20
OP270
ELECTRICAL SPECIFICATIONS
V
S
= ±15 V, −40°C ≤ T
A
≤ 85°C, unless otherwise noted.
Table 2.
Parameter
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Input Bias Voltage
Large-Signal Voltage Gain
Symbol
V
OS
TCV
OS
I
OS
I
B
A
VO
A
VO
Input Voltage Range
1
Output Voltage Swing
Common-Mode Rejection
Power Supply Rejection
Ratio
Supply Current
(All Amplifiers)
1
Test Conditions
OP270E
Min
Typ
Max
25
150
0.2
1
1.5
6
1800
900
±12.5
±13.5
120
0.7
4.4
30
60
OP270F
Min Typ
Max
45
275
0.4
2
5
15
1400
700
±12.5
±13.5
115
1.8
4.4
40
70
OP270G
Min Typ
Max
100
400
0.7
3
15
19
1250
670
±12.5
±13.5
100
2.0
4.4
50
80
Unit
μV
μV/°C
nA
nA
V/mV
V/mV
V
V
dB
μV/V
mA
V
CM
= 0 V
V
CM
= 0 V
V
O
= ±10 V,
R
L
= 10 kΩ
V
O
= ±10 V,
R
L
= 2 kΩ
R
L
≥ 2 kΩ
V
CM
= ±11 V
V
S
= ±4.5 V to ±18 V
No load
1000
500
±12
±12
100
600
300
±12
±12
94
5.6
7.2
400
225
±12
±12
90
10
7.2
IVR
V
O
CMR
PSRR
I
SY
1.5
7.2
Guaranteed by CMR test.
Rev. E | Page 4 of 20
OP270
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Differential Input Voltage
1
Differential Input Current
1
Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
Lead Temperature Range (Soldering, 60 sec)
Junction Temperature (T
J
)
Operating Temperature Range
1
Rating
18 V
1.0 V
±25 mA
Supply voltage
Continuous
−65°C to +150°C
300°C
−65°C to +150°C
−40°C to +85°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
For military processed devices, refer to the Standard Micro-
circuit Drawing (SMD) available at the Defense Logistics
Agency website.
Table 4. Analog Devices Equivalent to SMD
SMD Part Number
5962-8872101PA
Analog Devices Equivalent
OP270AZMDA
The OP270 inputs are protected by back-to-back diodes. To achieve low noise
performance, current-limiting resistors are not used. If the differential voltage
exceeds +10 V, the input current should be limited to ±25 mA.
ESD CAUTION
Rev. E | Page 5 of 20
