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P4C163L-35LMB

Standard SRAM, 8KX9, 35ns, CMOS, CQCC28, 0.350 X 0.550 INCH, CERAMIC, LCC-28

器件类别：存储    存储   

厂商名称：Pyramid Semiconductor Corporation

厂商官网：http://www.pyramidsemiconductor.com/

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参数 预览 参数对比
器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Pyramid Semiconductor Corporation
零件包装代码
QLCC
包装说明
QCCN,
针数
28
Reach Compliance Code
compliant
ECCN代码
3A001.A.2.C
最长访问时间
35 ns
JESD-30 代码
R-CQCC-N28
JESD-609代码
e0
长度
13.97 mm
内存密度
73728 bit
内存集成电路类型
STANDARD SRAM
内存宽度
9
功能数量
1
端子数量
28
字数
8192 words
字数代码
8000
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-55 °C
组织
8KX9
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
QCCN
封装形状
RECTANGULAR
封装形式
CHIP CARRIER
并行/串行
PARALLEL
峰值回流温度（摄氏度）
NOT SPECIFIED
认证状态
Not Qualified
筛选级别
MIL-STD-883 Class B
座面最大高度
1.905 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
TIN LEAD
端子形式
NO LEAD
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
8.89 mm
文档预览
P4C163/163L
P4C163/P4C163L
ULTRA HIGH SPEED 8K x 9
STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 25/35ns (Commercial)
– 25/35/45ns (Military)
Low Power Operation (Commercial/Military)
– 690/800 mW Active – 25
– 193/220 mW Standby (TTL Input)
– 5.5 mW Standby (CMOS Input) P4C163L
Output Enable and Dual Chip Enable Control
Functions
Single 5V
±
10% Power Supply
Data Retention with 2.0V Supply, 10
µ
A Typical
Current (P4C163L Military)
Common I/O
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil DIP, SOJ
– 28-Pin 350 x 550 mil LCC
– 28-Pin CERPACK
DESCRIPTION
The P4C163 and P4C163L are 73,728-bit ultra high-speed
static RAMs organized as 8K x 9. The CMOS memories re-
quire no clocks or refreshing and have equal access and
cycle times. Inputs are fully TTL-compatible. The RAMs op-
erate from a single 5V±10% tolerance power supply. With
battery backup, data integrity is maintained for supply volt-
ages down to 2.0V. Current drain is 10
µA
from a 2.0V supply.
Access times as fast as 25 nanoseconds are available, per-
mitting greatly enhanced system operating speeds. CMOS
is used to reduce power consumption in both active and
standby modes.
The P4C163 and P4C163L are available in 28-pin 300 mil
DIP and SOJ and 28-pin 350 x 550 mil LCC packages provid-
ing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
A
0
ROW
SELECT
73,728-BIT
MEMORY
ARRAY
PIN CONFIGURATIONS
V
CC
A
2
A
1
A
0
WE
A0
A
1
A
2
A
3
A
4
A
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
CE
2
A
12
A
11
A
10
OE
A
9
CE
1
I/O
9
I/O
8
I/O
7
I/O
6
I/O
5
3
A3
A
4
A
5
A
6
A
7
A
8
I/O
1
I/O
2
I/O
3
4
5
6
7
8
9
10
11
12
13
2
27
26
28
1
25
24
23
22
21
20
19
CE
2
A
12
A
11
A
10
OE
A
9
CE
1
I/O
9
I/O
8
A
7
I/O
1
INPUT
DATA
CONTROL
COLUMN I/O
A
6
A
7
A
8
I/O
1
COLUMN
SELECT
I/O
9
I/O
2
I/O
3
I/O
4
GND
14 15 16
18
17
GND
I/O
5
I/O
4
I/O
6
CE 1
CE 2
WE
OE
A
8
A
12
DIP (P5, C5), SOJ (J5)
CERPACK (F4) SIMILAR
TOP VIEW
LCC (L5)
TOP VIEW
Means Quality, Service and Speed
1Q97
109
I/O
7
P4C163/163L
MAXIMUM RATINGS
(1)
Symbol
V
CC
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND
(up to 7.0V)
Operating Temperature
Value
–0.5 to +7
–0.5 to
V
CC
+0.5
–55 to +125
Unit
V
Symbol
T
BIAS
T
STG
P
T
I
OUT
Parameter
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
–55 to +125
–65 to +150
1.0
50
Unit
°C
°C
W
mA
V
TERM
T
A
V
°C
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade
(2)
Military
Ambient
Temperature
–55 to +125°C
GND
0V
V
CC
5.0V
±
10%
Grade
(2)
Commercial
Ambient
Temperature
0°C to +70°C
GND
0V
V
CC
5.0V
±
10%
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage
(2)
Symbol
V
IH
V
IL
V
HC
V
LC
V
CD
V
OL
V
OLC
V
OH
V
OHC
I
LI
I
LO
Parameter
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
Output Low Voltage
(TTL Load)
Output Low Voltage
(CMOS Load)
Output High Voltage
(TTL Load)
Output High Voltage
(CMOS Load)
Input Leakage Current
Output Leakage Current
Test Conditions
P4C163
Min
2.2
–0.5
(3)
–0.5
(3)
Max
V
CC
+0.5
0.8
0.2
–1.2
0.4
0.2
2.4
V
CC
–0.2
–10
–5
–10
–5
+10
+5
+10
+5
P4C163L
Min
2.2
–0.5
(3)
–0.5
(3)
Max
V
CC
+0.5
0.8
0.2
–1.2
0.4
0.2
2.4
V
CC
–0.2
–5
N/A
–5
N/A
+5
N/A
+5
N/A
Unit
V
V
V
V
V
V
V
V
V
µA
µA
V
CC
–0.2 V
CC
+0.5
V
CC
= Min., I
IN
= –18 mA
I
OL
= +8 mA, V
CC
= Min.
I
OLC
= +100
µA,
V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
I
OHC
= –100
µA,
V
CC
= Min.
V
CC
= Max.
V
IN
= GND to V
CC
V
CC
= Max.,
CE
= V
IH
,
V
OUT
= GND to V
CC
Mil.
Com’l.
Mil.
Com’l.
V
CC
–0.2 V
CC
+0.5
CAPACITANCES
(4)
(V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz)
Symbol
C
IN
Parameter
Input Capacitance
Conditions Typ. Unit
V
IN
= 0V
5
pF
Symbol
C
OUT
Parameter
Output Capacitance
Conditions Typ. Unit
V
OUT
= 0V
7
pF
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with V
IL
and I
IL
not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
110
P4C163/163L
POWER DISSIPATION CHARACTERISTICS
Over recommended operating temperature and supply voltage
(2)
Symbol
I
CC
I
CC
I
SB
Parameter
Dynamic Operating
Current – 25
Dynamic Operating
Current – 35, 45
Test Conditions
V
CC
= Max., f = Max.,
Outputs Open
V
CC
= Max., f = Max.,
Outputs Open
Mil.
Com’l.
Mil.
Com’l.
Mil.
Com’l.
Mil.
Com’l.
P4C163
Min
—
—
—
—
—
—
—
—
Max
145
125
120
95
40
35
20
18
P4C163L
Min
—
—
—
—
—
—
—
—
Max
145
N/A
120
N/A
40
N/A
1
N/A
Unit
mA
mA
mA
Standby Power Supply
CE
1
≥
V
IH
or
Current (TTL Input Levels) CE
2
≤
V
IL
, V
CC
= Max.,
f = Max., Outputs Open
Standby Power Supply
Current
(CMOS Input Levels)
CE
1
≥
V
HC
or
CE
2
≤
V
LC
, V
CC
= Max.,
f = 0, Outputs Open,
V
IN
≤
V
LC
or V
IN
≥
V
HC
I
SB1
mA
n/a = Not Applicable
DATA RETENTION CHARACTERISTICS (P4C163L, Military Temperature Only)
Symbol
V
DR
I
CCDR
t
CDR
t
R†
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to
Data Retention Time
Operation Recovery Time
CE
1
≥
V
CC
– 0.2V or
CE
2
≤
0.2V, V
IN
≥
V
CC
– 0.2V
or V
IN
≤
0.2V
Test Condition
Min
2.0
10
0
t
RC§
15
200
300
Typ.*
V
CC
=
2.0V
3.0V
Max
V
CC
=
2.0V
3.0V
Unit
V
µA
ns
ns
*T
A
= +25°C
§
t
RC
= Read Cycle Time
†
This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
CC
t
CDR
CE
1
V
DR
V
HC
V
LC
V
HC
V
LC
4.5V
V
DR
≥
2V
4.5V
t
R
CE
2
111
P4C163/163L
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V
±
10%, All Temperature Ranges)
(2)
Symbol
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
OE
t
OLZ
t
OHZ
t
PU
t
PD
Parameter
Read Cycle Time
Address Access Time
Chip Enable
Access Time
Output Hold from
Address Change
Chip Enable to
Output in Low Z
Chip Disable to
Output in High Z
Output Enable
Low to Data Valid
Output Enable
Low to Low Z
Output Enable
High to High Z
Chip Enable to
Power Up Time
Chip Disable to
Power Down Time
-25
25
25
25
3
3
10
13
3
12
0
20
0
3
3
3
35
-35
45
35
35
3
3
15
18
3
15
0
20
-45
Min Max Min Max Min Max
45
45
Unit
ns
ns
ns
ns
ns
20
20
ns
ns
ns
20
ns
ns
25
ns
READ CYCLE NO. 1 (OE CONTROLLED)
(5)
OE
t
RC
ADDRESS
t
AA
OE
t
OE
CE
1
t
OLZ
(8)
t
OH
(9)
CE
2
t
AC
t
LZ
(8)
DATA OUT
t
OHZ
(8)
t
HZ
(8)
Notes:
5.
WE
is HIGH for READ cycle.
6.
CE
1
is LOW, CE
2
is HIGH and
OE
is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with
CE
1
transition
LOW and CE
2
transition HIGH.
8. Transition is measured
±
200mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
112
P4C163/163L
READ CYCLE NO. 2 (ADDRESS CONTROLLED)
(5,6)
t
RC
ADDRESS
t
AA
t
OH
DATA OUT
PREVIOUS DATA VALID
DATA VALID
(9)
READ CYCLE NO. 3 (CE
1
, CE
2
CONTROLLED)
(5,7,10)
CE
t
RC
CE
1
CE
2
t
AC
(10)
t
HZ
DATA VALID
(8,10)
t
LZ
DATA OUT
I
CC
V
CC
SUPPLY
CURRENT
I
SB
t
PU
(10)
(8,10)
HIGH IMPEDANCE
t
PD
(10)
Notes:
9. READ Cycle Time is measured from the last valid address to the first
transitioning address.
10. Transitions caused by a chip enable control have similar delays
irrespective of whether
CE
1
or CE
2
causes them.
113
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参数对比
与P4C163L-35LMB相近的元器件有：P4C163L-25CMB、P4C163L-45CMB、P4C163L-35FMB、P4C163L-35CMB、P4C163L-25LMB、P4C163L-45FMB、P4C163L-45LMB。描述及对比如下：
型号 P4C163L-35LMB P4C163L-25CMB P4C163L-45CMB P4C163L-35FMB P4C163L-35CMB P4C163L-25LMB P4C163L-45FMB P4C163L-45LMB
描述 Standard SRAM, 8KX9, 35ns, CMOS, CQCC28, 0.350 X 0.550 INCH, CERAMIC, LCC-28 Standard SRAM, 8KX9, 25ns, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28 Standard SRAM, 8KX9, 45ns, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28 Standard SRAM, 8KX9, 35ns, CMOS, CDFP28, CERAMIC, DFP-28 Standard SRAM, 8KX9, 35ns, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28 Standard SRAM, 8KX9, 25ns, CMOS, CQCC28, 0.350 X 0.550 INCH, CERAMIC, LCC-28 Standard SRAM, 8KX9, 45ns, CMOS, CDFP28, CERAMIC, DFP-28 Standard SRAM, 8KX9, 45ns, CMOS, CQCC28, 0.350 X 0.550 INCH, CERAMIC, LCC-28
是否无铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
厂商名称 Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation
零件包装代码 QLCC DIP DIP DFP DIP QLCC DFP QLCC
包装说明 QCCN, DIP, DIP, DFP, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28 QCCN, CERAMIC, DFP-28 0.350 X 0.550 INCH, CERAMIC, LCC-28
针数 28 28 28 28 28 28 28 28
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN代码 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C
最长访问时间 35 ns 25 ns 45 ns 35 ns 35 ns 25 ns 45 ns 45 ns
JESD-30 代码 R-CQCC-N28 R-CDIP-T28 R-CDIP-T28 R-GDFP-F28 R-CDIP-T28 R-CQCC-N28 R-GDFP-F28 R-CQCC-N28
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0
内存密度 73728 bit 73728 bit 73728 bit 73728 bit 73728 bit 73728 bit 73728 bit 73728 bit
内存集成电路类型 STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
内存宽度 9 9 9 9 9 9 9 9
功能数量 1 1 1 1 1 1 1 1
端子数量 28 28 28 28 28 28 28 28
字数 8192 words 8192 words 8192 words 8192 words 8192 words 8192 words 8192 words 8192 words
字数代码 8000 8000 8000 8000 8000 8000 8000 8000
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
组织 8KX9 8KX9 8KX9 8KX9 8KX9 8KX9 8KX9 8KX9
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
封装代码 QCCN DIP DIP DFP DIP QCCN DFP QCCN
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 CHIP CARRIER IN-LINE IN-LINE FLATPACK IN-LINE CHIP CARRIER FLATPACK CHIP CARRIER
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
筛选级别 MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B MIL-STD-883 Class B
座面最大高度 1.905 mm 5.715 mm 5.715 mm 2.286 mm 5.715 mm 1.905 mm 2.286 mm 1.905 mm
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES NO NO YES NO YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
端子面层 TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD
端子形式 NO LEAD THROUGH-HOLE THROUGH-HOLE FLAT THROUGH-HOLE NO LEAD FLAT NO LEAD
端子节距 1.27 mm 2.54 mm 2.54 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm 1.27 mm
端子位置 QUAD DUAL DUAL DUAL DUAL QUAD DUAL QUAD
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
宽度 8.89 mm 7.62 mm 7.62 mm 9.017 mm 7.62 mm 8.89 mm 9.017 mm 8.89 mm
长度 13.97 mm 36.449 mm 36.449 mm - 36.449 mm 13.97 mm - 13.97 mm
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器件捷径:
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