PIP8000FHN
PMBus compliant digital power supervisor
Rev. 02 — 6 July 2009
Preliminary data sheet
1. General description
The PIP8000FHN is a Power Management Bus (PMBus) protocol compliant, digital power
supervisor IC, configurable through a host system to meet dynamic converter
performance for a multitude of power supply applications. It is also able to manage power
supply operating conditions as well as to monitor and report the status back to a host
system using the PMBus protocol.
The PMBus standard uses the widely accepted Inter-Integrated Circuit (I
2
C)
communication protocol for the hardware interface. A number of additional features are
added to enhance the basic I
2
C communication protocol. These are described in the
System Management Bus (SMBus) protocol and include SMAlert.
2. Features
I
PMBus serial interface:
N
Query I/O voltage, I/O current, warnings, faults
N
Query temperature for up to two temperature sensors
N
Configure and measure RPM for up to two fans
N
Sequence start-up and turn-off
I
Configurable 7-channel A/D with calibration factors
I
I
2
C device-address pin stripping
I
Compatible with most analog controllers
I
Power-on reset
I
I
2
C-bus up to 400 kHz
I
2.4 V to 3.6 V V
DD
operating range
I
5 V tolerant I/O pins
I
Thermal sense capabilities
I
28 pin HVQFN package, 6 mm
×
6 mm
3. Applications
I
I
I
I
I
I
I
PMBus compliant low voltage, high current density applications
DC power distributed systems
Networking applications
Servers and server accessories
Telecommunication systems
Industrial / ATE power applications
Storage systems
NXP Semiconductors
PIP8000FHN
Digital power supervisor
I
AC/DC and DC-to-DC applications
4. Ordering information
Table 1.
Ordering information
Package
Name
PIP8000FHN/N1
HVQFN28
Description
plastic thermal enhanced very thin quad flat package; no leads;
28 terminals; body 6
×
6
×
0.85 mm
Version
SOT788-1
Type number
5. Block diagram
A/D V
o
FAN CONTROL 1
A/D I
out
PROCESSOR
FAN CONTROL 2
A/D I
IN
USER I/O
A/D V
IN
FAULT (LED CAPABLE)
A/D TEMP 1
ENABLE/DISABLE
PIP8000
A/D TEMP 2
PWM V set
A/D USER DEFINE
ALERT
FAN SENSOR 1
FAN SENSOR 2
PMBUS
COMMAND
INTERPRETER
CONTROL
WRITE PROTECT
I
2
C PORT
014aaa585
Fig 1.
Block diagram
PIP8000FHN_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 6 July 2009
2 of 26
NXP Semiconductors
PIP8000FHN
Digital power supervisor
6. Pinning information
6.1 Pinning
28 SAMPLE_VOUT
27 SAMPLE_OUT
25 FAN_SPEED2
24 FAN_SPEED1
terminal 1
index area
PMBUS_CTRL
RESET
V
SS
FAULT_LED
PMBUS_ALERT
WRITE_PROTECT
PMBUS_SDA
1
2
3
4
5
6
7
ADDRESS1 10
ADDRESS2 11
ENABLE 12
RXD_ALERT 13
TXD 14
8
9
22 SAMPLE_VIN
21 SAMPLE_IIN
20 TEMP1
19 USER_A_D
18 GPIO
17 V
DD
16 FAN_CONTROL1
15 FAN_CONTROL2
014aaa583
PIP8000
PMBUS_SCL
Transparent top view
Fig 2.
Pin configuration
6.2 Pin description
Table 2.
Symbol
PMBUS_CTRL
Pin description
Pin
1
Type
I
Description
An input line from the host controller used to control the
device in conjunction with commands over PMBus. Can
be configured active HIGH or LOW through the
ON_OFF_Config command.
Active LOW reset
Ground: 0 V reference.
O
O
I
User configurable. Used to enable/disable green/red LED.
Interrupt line to SMBbus host controller
When this pin is HIGH or n.c., only the PMBus command
Write Protect can be read. Used to protect PoL data
settings. Ground to Write.
Data and clock lines of the I
2
C/SMBus v 1.1 standard
Data and clock lines of the I
2
C/SMBus v 1.1 standard
I
2
C subaddress selection line 0
I
2
C subaddress selection line 1
I
2
C subaddress selection line 2
RESET
V
SS
FAULT_LED
PMBUS_ALERT
2
3
4
5
WRITE_PROTECT 6
PMBUS_SDA
PMBUS_SCL
ADDRESS0
ADDRESS1
ADDRESS2
7
8
9
10
11
I/O
I/O
O
O
O
PIP8000FHN_2
ADDRESS0
23 VOUT_TRIM
26 TEMP2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 6 July 2009
3 of 26
NXP Semiconductors
PIP8000FHN
Digital power supervisor
Pin description
…continued
Pin
12
Type
O
Description
A default but configurable pin dedicated to controlling the
on/off operation of the power train. May be set either
HIGH or LOW to enable.
Table 2.
Symbol
ENABLE
RXD_ALERT
TXD
FAN_CONTROL2
FAN_CONTROL1
V
DD
GPIO
User_A_D
TEMP1
13
14
15
16
17
18
19
20
O
O
O
O
User configurable active HIGH/LOW fan 1 on off.
User configurable active HIGH/LOW fan 2 on off.
This is the power supply for normal operation as well as
Idle mode and Power-down mode.
I/O
I
I
General Purpose Input/Output
Readable User A/D. Coefficients can be set for a
particular calibration/scale factor configuration.
Common analog temperature sensors connection, the
output of which is typically 25 mV /
°C.
Coefficients can be
set for a particular calibration/scale factor configuration.
Current sense amplifier connection. Coefficients can be
set for a particular calibration/scale factor configuration.
Connection for either directly to V
IN
if less than V
DD
or
through a resistor divider if higher than V
DD
. Coefficients
can be set for a particular calibration/scale factor
configuration.
This is a 20 kHz PWM square wave with a duty cycle that
is directly controlled by the PMBus V
out
command. This
waveform is externally integrated to develop a DC level,
buffered, and then driven through a series scaling resistor
to become a current source into the analog controller
voltage feedback pin, which then changes the output
voltage of the power train. The scaling resistor can scale
the duty cycle change at pin 23 so that the power train
output voltage may be varied from V to mV. Coefficients
can be set for a particular calibration/scale factor
configuration.
Read-only pins connected as a 16-bit counter and used to
count fan RPM in certain applications. This requires fans
with three-pin wiring.
See pin 20, TEMP1.
Current sense amp connection. Coefficients can be set
for a particular calibration/scale factor configuration.
Connected either directly to V
o
if less than V
DD
or through
a resistor divider if higher than V
DD
. Coefficients can be
set for a particular calibration/scale factor configuration.
SAMPLE_IIN
SAMPLE_VIN
21
22
I
I
VOUT_TRIM
23
O
FAN_SPEED1,
FAN_SPEED2
TEMP2
SAMPLE_IOUT
SAMPLE_VOUT
24, 25
I
26
27
28
I
I
I
PIP8000FHN_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 6 July 2009
4 of 26
NXP Semiconductors
PIP8000FHN
Digital power supervisor
7. Functional description
7.1 System interfaces
There are several interfaces:
•
PMBus - Two lines consisting of a serial clock and serial data, conforming to
SMBus V. 2.0, including digital lines called control and one SMAlert.
•
Seven channels of 10-bit resolution A/D for measurement of temperatures and I/O
volts and current with one channel user definable.
•
Two channels of low frequency 16-bit counters for fan speed measurement.
•
Pulse Width Modulation (PWM) output with 10 bits of duty cycle resolution for setting
a DC level to adjust analog PWM controllers and hence the power supply output
voltage.
7.2 Operations
PMBus defines that a compliant device must start and operate stably without PMBus
communications. When a module implementing the PIP8000FHN is powered up, the
PIP8000FHN goes through several levels of configuration, finishing by loading the end
user operating parameters from NVRAM, measuring input voltage, checking the power
train for proper operating environment and, when configured, enables the output voltage.
It may operate without any host interaction. If commanded, it can deliver status
information. This will allow the host controller to collect data at the system designer's
initiative, including long term data for system reliability purposes. Finally, it will issue
warnings if operating margins are exceeded or perform selected actions if actual
operating Fault limits are exceeded.
7.3 Product functions
•
•
•
•
•
•
•
PMBus compliant, support commands are listed in
Table 10
Configurable overvoltage/undervoltage, overcurrent, and temperature protection
Configurable response to fault events and warnings
Configurable sequencing
Wide range output voltage
Configurable output voltage ramping
Non-volatile memory for storing configuration values, device specifications, etc.
7.4 Host interface
The PIP8000FHN can run stand-alone or a host controller can be connected using the
I
2
C interface. With a host controller the PIP8000FHN can be controlled and monitored
using the PMBus commands as listed in
Section 10.
7.4.1 I
2
C slave address
Any device that exists on the System Management Bus (SMB) as a slave has a unique
address called the slave address. For reference, the following addresses are reserved and
must not be used by or assigned to any SMBus slave device.
PIP8000FHN_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 6 July 2009
5 of 26
