RD30LDT595
8–bit Serial–in Parallel–out LED Driver IC
REJ03D0906-0200
Rev.2.00
Jun 16, 2008
Description
The RD30LDT595 has eight edge trigger D–type Flip–Flops with eight latches in 16–pin package. Data is input to the
serial data input and the clock pulse is input to the clock input. When the clock is changed from ”L” to ”H”, the signal
of the data input enters an internal shift register. The data of the shift register is shifted one by one. In addition, output
load circuit is added so that power supply prevents a wrong action in on/off. When Vcc is less than a fixed level, the
output (Q1 to
Q8)
compulsorily is off state. Low–voltage and high–speed operation is suitable for battery–powered
product (e.g., notebook computers), and the low–power consumption extends the battery life.
Features
•
•
•
•
•
•
Supply voltage range : 4.5 to 5.5 V, V
O
= 30V
Output current : I
O
= 100 mA (@V
CC
= 5 V)
All the logical input has hysteresis voltage for the slow transition.
Input with pull-up resistance. (Enable, Latch terminal)
Input with pull-down resistance. (CLK, S-in terminal)
Ordering Information
Part Name
RD30LDT595PT0
RD30LDT595FPH0
Note:
Package Type
DILP-16 pin
SOP-16 pin
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
T (1,000 pcs/reel)
H (2,000 pcs/reel)
Surface
Treatment
0 (Ni/Pd/Au)
0 (Ni/Pd/Au)
Please consult the sales office for the above package availability.
Pin Arrangement
CLK 1
S-in 2
GND 3
V
CC
4
S-out 5
Latch 6
Enable
7
GND 8
(Top view)
16
Q1
15
Q2
14
Q3
13
Q4
12
Q5
11
Q6
10
Q7
9
Q8
REJ03D0906-0200 Rev.2.00, Jun 16, 2008
Page 1 of 7
RD30LDT595
Logic Diagram
V
CC
S-in
D
CLK
CK
Q
V
CC
L
Output wrong action
protection circuit
Q1
D
Q
Latch
D
V
CC
CK
Q
D
Q
L
Q8
Enable
S-out
Function Table
Inputs
S-in
L
L
H
H
H
*1
Outputs
Latch
L
H
L
H
H
Enable
L
L
L
L
H
Q1
to
Q8
t-1
Z
t-1
L
Z
S-out
L
L
H
H
H
CLK
IN
IN
IN
IN
IN
*1
IN : Input the following signal in CLK
1
2
7
8
H : High level
L : Low level
Z : High impedance
t - 1 : Output level before the indicated steady state input conditions were established.
REJ03D0906-0200 Rev.2.00, Jun 16, 2008
Page 2 of 7
RD30LDT595
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range
Output voltage range
*1,
Continuous output current
Maximum power dissipation
*2
at Ta = 25°C (in still air)
Storage temperature
Symbol
V
CC
V
I
V
O
I
O
P
d
Tstg
Ratings
–0.5 to 7
–0.5 to V
CC
+ 0.5
–0.5 to 30
–0.5 to V
CC
+ 0.5
100
1.19
0.79
–65 to 150
Unit
V
V
V
V
mA
W
°C
Test Conditions
Output : Z (OFF)
S-out
V
O
= 0 to V
CC
DILP
SOP
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore no two of
which may be realized at the same time.
1. This value is limited to 30 V maximum.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Supply voltage range
Output voltage range
Output current (per pin)
Operating free-air temperature
Note:
Symbol
V
CC
V
O
I
O
T
a
Min
4.5
—
0
0
–40
Max
5.5
30
100
100
85
Unit
V
V
mA
mA
°C
Conditions
Q1
to
Q8
: Z (OFF)
DILP Duty cycle
≤
100%
SOP
Duty cycle
≤
60%
Q1
to
Q8
: ON
Unused or floating inputs must be held high or low.
Electrical Characteristic
Item
Input voltage
Input current
Output voltage
(S-out)
Output voltage
(Q1 to
Q8)
Output leakage current
Symbol V
CC
(V) *
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
V
OL
I
OLK
4.5 to 5.5
4.5 to 5.5
5.5
5.5
5.0
5.0
5.0
5.5
Ta = 25°C
Min
2.0
0
—
—
4.9
—
—
—
Typ
—
—
—
—
—
—
—
—
Max
V
CC
0.8
25
–25
—
0.1
0.55
50
Ta = –40 to 85°C
Min
2.0
0
—
—
4.9
—
—
—
Typ
—
—
—
—
—
—
—
—
Max
V
CC
0.8
30
–30
—
0.1
0.77
100
Unit
V
V
µA
µA
V
V
V
µA
µA
µA
V
V
V
IH
= 5.5 V
V
IL
= 0 V
I
OH
= –1
µA
I
OL
= 1
µA
I
OL
= 100 mA
V
O
= 30 V
(Output : Z (OFF))
Input : Open
All driver output :
OFF
Driver output one
circuit : ON
Test condition
Quiescent supply
current
I
CC
1
I
CC
2
5.5
5.5
—
—
—
—
2.9
2.6
—
—
3.4
3.1
300
300
3.9
3.6
—
—
2.6
2.3
—
—
3.4
3.1
500
500
4.2
3.9
Driver output wrong
action protection voltage
Note:
V
T
+
V
T
-
For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
REJ03D0906-0200 Rev.2.00, Jun 16, 2008
Page 3 of 7
RD30LDT595
Timing Characteristics
(V
CC
= 5 V, C
L
= 15 pF, R
L
(S-out) =
∞,
R
L
(Qn) = 100
Ω,
t
r
= t
f
= 20 ns)
Item
Maximum clock frequency
Pulse width
Pulse width
Setup time
Hold time
Setup time
Clock pulse rise time
Clock pulse fall time
Symbol
f
max
t
W
t
W
t
su
t
h
t
su
t
r
t
f
Min
—
30
30
30
20
60
—
—
Ta = 25°C
Typ
Max
—
—
—
—
—
—
—
—
12.5
—
—
—
—
—
500
500
Ta = –40 to 85°C
Min
Typ
Max
—
30
30
30
20
60
—
—
—
—
—
—
—
—
—
—
12.5
—
—
—
—
—
500
500
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
Test condition
Duty cycle =
45 % to 55 %
CLK
Latch
S-in to CLK
S-in to CLK
Latch to CLK
Switching Characteristics
(V
CC
= 5 V, C
L
= 15 pF, R
L
(S-out) =
∞,
R
L
(Qn) = 100
Ω
, t
r
= t
f
= 20 ns)
Item
Symbol
t
PLH
t
PHL
Propagation delay time
t
PLH
t
PHL
t
PLH
t
PHL
Ta = 25°C
Min
—
—
—
—
—
—
Typ
—
—
—
—
—
—
Max
60
60
70
70
70
70
Ta = –40 to 85°C
Min
—
—
—
—
—
—
Typ
—
—
—
—
—
—
Max
60
60
70
70
70
70
Unit
ns
ns
ns
FROM
(Input)
CLK
CLK
Enable
TO
(Output)
S-out
Qn
Qn
Test Circuit
V
CC
Input
Pulse Generator
Z
out
= 50
Ω
Input
Pulse Generator
Z
out
= 50
Ω
See Function Table
V
CC
CLK
S-in
Latch
Enable
S-out
C
L
R
L
Qn
R
L
Output
C
L
Output
GND
Notes 1. Input waveform : PRR
≤
1MHz, Duty Cycle = 50%, tr
≤
20ns, tf
≤
20ns
2. C
L
includes probe and jig capacitance.
REJ03D0906-0200 Rev.2.00, Jun 16, 2008
Page 4 of 7
RD30LDT595
Waveforms
•
Waveform – 1
t
r
Input CLK
10 %
90 %
1.5 V
10 %
t
f
3V
1.5 V
0V
t
PHL
V
OH
t
PLH
Output S-out
50 %
50 %
V
OL
t
r
Input
Enable
10 %
90 %
1.5 V
90 %
1.5 V
10 %
t
f
3V
0V
V
OH
t
PLH
Output
Qn
50 %
t
PHL
50 %
t
PLH
50 %
t
PHL
50 %
V
OL
•
Waveform – 2
t
r
, t
f
Input S-in
90 %
10 %
90 %
1.5 V
10 %
90 %
10 %
t
r
, t
f
90 %
1.5 V
3V
0V
t
r
90 %
t
su
Input CLK
1.5 V
t
h
1.5 V
10 %
t
f
3V
10 %
0V
3V
t
w
Input Latch
t
su
10 %
t
r
90 %
1.5 V
90 %
1.5 V
t
f
10 %
0V
t
w
Notes 1. Input waveform : PRR
≤
1 MHz, Zo = 50
Ω,
t
r
≤
20 ns, t
f
≤
20 ns
2. The output are measured one at a time with one transition per measurement.
REJ03D0906-0200 Rev.2.00, Jun 16, 2008
Page 5 of 7
