CCD image sensors
S11071/S10420-01 series
Improved etaloning characteristics,
High-speed type and low noise type available
The S11071/S10420-01 series are back-thinned CCD image sensors designed for spectrometers. Two types consisting of
a high-speed type (S11071 series) and low noise type (S10420-01 series) are available with improved etaloning charac-
teristics. The S11071/S10420-01 series offer nearly
fl
at spectral response characteristics with high quantum efficiency
from the UV to near infrared region.
Features
Improved etaloning characteristics
High sensitivity over a wide spectral range and nearly
fl
at spectral response characteristics
High CCD node sensitivity: 8
μV/e
- (S11071 series)
6.5
μV/e
- (S10420-01 series)
High full well capacity and wide dynamic range
(with anti-blooming function)
Pixel size: 14 × 14
μm
Applications
Spectrometers, etc.
Selection guide
Type no.
S11071-1004
S11071-1006
S11071-1104
S11071-1106
S10420-1004-01
S10420-1006-01
S10420-1104-01
S10420-1106-01
Number of
total pixels
1044
1044
2068
2068
1044
1044
2068
2068
×
×
×
×
×
×
×
×
22
70
22
70
22
70
22
70
Number of effective
pixels
1024
1024
2048
2048
1024
1024
2048
2048
×
×
×
×
×
×
×
×
16
64
16
64
16
64
16
64
Image size
[mm (H) × mm (V)]
14.336
14.336
28.672
28.672
14.336
14.336
28.672
28.672
×
×
×
×
×
×
×
×
0.224
0.896
0.224
0.896
0.224
0.896
0.224
0.896
Readout speed
max.
(MHz)
10
Suitable
driver circuit
C11288
0.5
C11287
Improved etaloning characteristics
Etaloning is an interference phenomenon that occurs when the light
incident on a CCD repeatedly reflects between the front and back
surfaces of the CCD while being attenuated, and causes alternately
high and low sensitivity. When long-wavelength light enters a back-
thinned CCD, etaloning occurs due to the relationship between the
silicon substrate thickness and the absorption length. The S11071/
S10420-01 series back-thinned CCDs have achieved a significant im-
provement in etaloning by using a unique structure that is unlikely
to cause interference.
Etaloning characteristics (typical example)
110
100
90
(Ta=25 °C)
Etaloning-improved type
Relative sensitivity (%)
80
70
60
50
40
30
20
10
0
900 910 920 930 940 950 960 970 980 990 1000
Previous type
Wavelength (nm)
KMPDB0284EB
www.hamamatsu.com
1
CCD image sensors
S11071/S10420-01 series
Structure
14 × 14
μm
2-phase
4-phase
Two-stage MOSFET source follower
One-stage MOSFET source follower
24-pin ceramic DIP (refer to dimensional outline)
Quartz glass*
2
Non-cooled
*1:
Temporary window type (ex: S11071-1106N, S10420-1106N-01) is available upon request.
*2:
Resin sealing
Parameter
Pixel size (H × V)
Vertical clock phase
Horizontal clock phase
Output circuit
Package
Window material*
1
Cooling
S11071 series
S10420-01 series
Absolute maximum ratings (Ta=25 °C)
Parameter
Operating temperature*
3
Storage temperature
S11071
series
Output transistor
drain voltage
S10420-01
series
Reset drain voltage
Output amplifier return voltage
Overflow drain voltage
Vertical input source voltage
Horizontal input source voltage
Overflow gate voltage
Vertical input gate voltage
Horizontal input gate voltage
Summing gate voltage
Output gate voltage
Reset gate voltage
Transfer gate voltage
Vertical shift register clock voltage
Horizontal shift register clock voltage
Symbol
Topr
Tstg
VOD
VRD
Vret
VOFD
VISV
VISH
VOFG
VIG1V, VIG2V
VIG1H, VIG2H
VSG
VOG
VRG
VTG
VP1V, VP2V
VP1H, VP2H
VP3H, VP4H
Min.
-50
-50
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-10
-10
-10
-10
-10
-10
-10
-10
-10
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max.
+50
+70
+25
+30
+18
+18
+18
+18
+18
+15
+15
+15
+15
+15
+15
+15
+15
+15
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
*3:
Package temperature
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the
product within the absolute maximum ratings.
Operating conditions (MPP mode, Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
Overflow drain voltage
Overflow gate voltage
Output gate voltage
Substrate voltage
Output amplifier return voltage*
4
Input source
Test point
Vertical input gate
Horizontal input gate
Vertical shift register clock voltage
High
Low
High
Horizontal shift register clock voltage
Low
Summing gate voltage
Reset gate voltage
Transfer gate voltage
High
Low
High
Low
High
Low
Symbol
S11071 series
Min.
Typ.
Max.
12
15
18
14
15
16
11
12
13
0
13
14
4
5
6
-
0
-
-
1
2
-
VRD
-
-9
-8
-
-9
-8
-
4
6
8
-9
-8
-7
S10420-01 series
Min.
Typ.
Max.
23
24
25
11
12
13
11
12
13
0
12
13
4
5
6
-
0
-
-
-
-
8
-7
8
V
-4
8
-4
8
-4
8
-7
110
V
V
V
kΩ
Unit
V
V
V
V
V
V
V
V
V
V
V
External load resistance
*4:
Output amplifier return voltage is a positive
out of the sensor.
VOD
VRD
VOFD
VOFG
VOG
VSS
Vret
VISV, VISH
-
VRD
VIG1V, VIG2V
-9
-8
VIG1H, VIG2H
-9
-8
VP1VH, VP2VH
4
6
VP1VL, VP2VL
-9
-8
VP1HH, VP2HH
4
6
8
4
6
VP3HH, VP4HH
VP1HL, VP2HL
-6
-5
-4
-6
-5
VP3HL, VP4HL
VSGH
4
6
8
4
6
VSGL
-6
-5
-4
-6
-5
VRGH
4
6
8
4
6
VRGL
-6
-5
-4
-6
-5
VTGH
4
6
8
4
6
VTGL
-9
-8
-7
-9
-8
2.0
2.2
2.4
90
100
RL
voltage with respect to Substrate voltage, but the current
fl
ows in
the direction of
fl
ow
2
CCD image sensors
S11071/S10420-01 series
Electrical characteristics (Ta=25 °C)
Parameter
Signal output frequency*
5
Vertical shift register
capacitance
Horizontal shift register
capacitance
Summing gate capacitance
Reset gate capacitance
Transfer gate capacitance
Charge transfer efficiency*
6
DC output level*
5
Output impedance*
5
Power consumption*
5
*
7
-1004(-01)
-1006(-01)
-1104(-01)
-1106(-01)
-1004(-01)/-1006(-01)
-1104(-01)/-1106(-01)
Symbol
fc
C
P1V
, C
P2V
C
P1H
, C
P2H
C
P3H
, C
P4H
C
SG
C
RG
C
TG
CTE
Vout
Zo
P
S11071 series
Min.
Typ.
Max.
-
5
10
-
200
-
-
600
-
-
400
-
-
1200
-
-
80
-
-
160
-
-
10
-
-
10
-
-
30
-
-
60
-
0.99995 0.99999
-
7
8
9
-
0.3
-
-
75
-
S10420-01 series
Min.
Typ.
Max.
-
0.25
0.5
-
200
-
-
600
-
-
400
-
-
1200
-
-
80
-
-
160
-
-
10
-
-
10
-
-
30
-
-
60
-
0.99995 0.99999
-
17
18
19
-
10
-
-
4
-
Unit
MHz
pF
pF
pF
pF
pF
-
V
kΩ
mW
-1004(-01)/-1006(-01)
-1104(-01)/-1106(-01)
*5:
The values depend on the load resistance. (S11071 series: V
OD
=15 V, R
L
=2.2 kΩ, S10420-01 series: V
OD
=24 V, R
L
=100 kΩ)
*6:
Charge transfer efficiency per pixel, measured at half of the full well capacity
*7:
Power consumption of the on-chip amplifier plus load resistance
Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter
Saturation output voltage
Full well capacity
CCD node sensitivity*
8
Dark current*
9
Readout noise*
10
Dynamic range*
11
Spectral response range
Photoresponse nonuniformity*
12
Vertical
Horizontal
Symbol
Vsat
Fw
Sv
DS
Nr
DR
λ
PRNU
S11071 series
Min.
Typ.
Max.
-
Fw × Sv
-
50
60
-
150
200
-
7
8
9
-
50
500
-
23
28
6520
8700
-
200 to
-
-
1100
-
±3
±10
S10420-01 series
Min.
Typ.
Max.
-
Fw × Sv
-
50
60
-
250
300
-
5.5
6.5
7.5
-
50
500
-
6
15
41700
50000
-
200 to
-
-
1100
-
±3
±10
Unit
V
ke
-
μV/e
-
e
-
/pixel/s
e
-
rms
-
nm
%
Line binning
*8:
The values depend on the load resistance. (S11071 series: V
OD
=15 V, R
L
=2.2 kΩ, S10420-01 series: V
OD
=24 V, R
L
=100 kΩ)
*9:
Dark current is reduced to half for every 5 to 7 °C decrease in temperature.
*10:
S11071 series (temperature: 25 °C): fc=2 MHz, S10420-01 series (temperature: -40 °C): fc=20 kHz
*11:
Dynamic range = Full well capacity / Readout noise
*12:
Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 660 nm)
Photoresponse nonuniformity =
Fixed pattern noise (peak to peak)
Signal
× 100 [%]
3
CCD image sensors
S11071/S10420-01 series
Spectral response (without window)*
13
100
(Typ. Ta=25 °C)
Spectral transmittance characteristic of window material
100
(Typ. Ta=25 °C)
80
80
Quantum efficiency (%)
60
Transmittance (%)
60
40
40
20
20
0
200
400
600
800
1000
1200
0
100 200 300 400 500 600 700 800 900 1000 1100
Wavelength (nm)
KMPDB0316EA
Wavelength (nm)
KMPDB0303EA
*13:
Spectral response with quartz glass is decreased according to
the spectral transmittance characteristic of window material.
Dark current vs. temperature
100
(Typ.)
Dark current (e-/pixel/s)
10
1
0.1
0.01
-50
-40
-30
-20
-10
0
10
20
30
Temperature (
°C
)
KMPDB0304EA
4
CCD image sensors
S11071/S10420-01 series
Device structure (conceptual drawing of top view in dimensional outline)
S11071 series
Effective pixels
Thinning
Effective pixels
23
22
21
20
19
18
17
16
Horizontal
shift register
24
1
2
15
5
4
3
2
1 2 3 4 5
14
1024
13
2 signal output
V=16, 64
H=1024, 2048
64
Thinning
2-bevel
3
4
5
6
7
8
9
10
11
12
4 blank pixels
Horizontal
shift register
6-bevel
2
n
signal output
4 blank pixels
6-bevel
Note: When viewed from the direction of the incident light, the horizontal shift register is
covered with a thick silicon layer (dead layer). However, long-wavelength light
passes through the silicon dead layer and may possibly be detected by the horizontal
shift register. To prevent this, provide light shield on that area as needed.
KMPDC0343EB
S10420-01 series
Effective pixels
Thinning
Effective pixels
23
22
21
20
19
18
17
16
Horizontal
shift register
24
15
5
4
3
2
1 2 3 4 5
14
1024
13
2
n
signal output
4-bevel
V=16, 64
H=1024, 2048
64
Thinning
1
2
3
4
5
6
n
7
8
9
10
11
12
4 blank pixels
Horizontal
shift register
6-bevel
2 signal output
4 blank pixels
6-bevel
Note: When viewed from the direction of the incident light, the horizontal shift register is
covered with a thick silicon layer (dead layer). However, long-wavelength light
passes through the silicon dead layer and may possibly be detected by the horizontal
shift register. To prevent this, provide light shield on that area as needed.
KMPDC0269EC
2-bevel
4-bevel
n
5
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