"Spansion, Inc." and "Cypress Semiconductor Corp." have merged together to deliver high-performance, high-quality solutions
at the heart of today's most advanced embedded systems, from automotive, industrial and networking platforms to highly
interactive consumer and mobile devices. The new company "Cypress Semiconductor Corp." will continue to offer "Spansion,
Inc." products to new and existing customers.
Continuity of Specifications
There is no change to this document as a result of offering the device as a Cypress product. Any changes that have been made
are the result of normal document improvements and are noted in the document history page, where supported. Future
revisions will occur when appropriate, and changes will be noted in a document history page.
Continuity of Ordering Part Numbers
Cypress continues to support existing part numbers. To order these products, please use only the Ordering Part Numbers listed
in this document.
For More Information
Please contact your local sales office for additional information about Cypress products and solutions.
S29GL064N, S29GL032N
64 Mbit, 32 Mbit 3 V Page Mode
MirrorBit Flash
Distinctive Characteristics
Architectural Advantages
Single power supply operation
Manufactured on 110 nm MirrorBit process technology
Secured SiliconSector region
– 128-word/256-byte sector for permanent, secure identification
through an 8-word/16-byte random Electronic Serial Number,
accessible through a command sequence
– Programmed and locked at the factory or by the customer
Flexible sector architecture
– 64Mb (uniform sector models): One hundred twenty-eight 32
Kword (64 KB) sectors
– 64 Mb (boot sector models): One hundred twenty-seven 32 Kword
(64 KB) sectors + eight 4Kword (8KB) boot sectors
– 32 Mb (uniform sector models): Sixty-four 32Kword (64 KB)
sectors
– 32 Mb (boot sector models): Sixty-three 32Kword (64 KB) sectors
+ eight 4Kword (8KB) boot sectors
Enhanced VersatileI/O
™
Control
– All input levels (address, control, and DQ input levels) and outputs
are determined by voltage on V
IO
input. V
IO
range is 1.65 to V
CC
Compatibility with JEDEC standards
– Provides pinout and software compatibility for single-power supply
flash, and superior inadvertent write protection
100,000 erase cycles typical per sector
20-year data retention typical
– 16-word/32-byte write buffer which reduces overall programming
time for multiple-word updates
Low power consumption
– 25 mA typical initial read current,
1 mA typical page read current
– 50 mA typical erase/program current
– 1 µA typical standby mode current
Package options
– 48-pin TSOP
– 56-pin TSOP
– 64-ball Fortified BGA
– 48-ball fine-pitch BGA
Software & Hardware Features
Software features
– Advanced Sector Protection: offers Persistent Sector Protection
and Password Sector Protection
– Program Suspend & Resume: read other sectors before
programming operation is completed
– Erase Suspend & Resume: read/program other sectors before an
erase operation is completed
– Data# polling & toggle bits provide status
– CFI (Common Flash Interface) compliant: allows host system to
identify and accommodate multiple flash devices
– Unlock Bypass Program command reduces overall multiple-word
programming time
Hardware features
– WP#/ACC input accelerates programming time (when high voltage
is applied) for greater throughput during system production.
Protects first or last sector regardless of sector protection settings
on uniform sector models
– Hardware reset input (RESET#) resets device
– Ready/Busy# output (RY/BY#) detects program or erase cycle
Performance Characteristics
High performance
– 90 ns access time
– 8-word/16-byte page read buffer
– 25 ns page read time
Cypress Semiconductor Corporation
Document Number: 001-98525 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised October 16, 2015
S29GL064N, S29GL032N
General Description
The S29GL-N family of devices are 3.0-Volt single-power Flash memory manufactured using 110 nm MirrorBit technology. The
S29GL064N is a 64-Mb device organized as 4,194,304 words or 8,388,608 bytes. The S29GL032N is a 32-Mb device organized as
2,097,152 words or 4,194,304 bytes. Depending on the model number, the devices have 16-bit wide data bus only, or a 16-bit wide
data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The devices can be programmed either in the
host system or in standard EPROM programmers.
Access times as fast as 90 ns are available. Note that each access time has a specific operating voltage range (V
CC
) as specified in
the
Product Selector Guide
and the
Ordering Information–S29GL032N,
and
Ordering Information–S29GL064N.
Package offerings
include 48-pin TSOP, 56-pin TSOP, 48-ball fine-pitch BGA and 64-ball Fortified BGA, depending on model number. Each device has
separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.
Each device requires only a
single 3.0-Volt power supply
for both read and write functions. In addition to a V
CC
input, a high-
voltage
accelerated program (ACC)
feature provides shorter programming times through increased voltage on the WP#/ACC or
ACC input. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if
desired.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Commands are written to
the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the
programming and erase operations.
The
sector erase architecture
allows memory sectors to be erased and reprogrammed without affecting the data contents of other
sectors. The device is fully erased when shipped from the factory.
The
Advanced Sector Protection
features several levels of sector protection, which can disable both the program and erase
operations in certain sectors. Persistent Sector Protection is a method that replaces the previous 12-volt controlled protection
method. Password Sector Protection is a highly sophisticated protection method that requires a password before changes to certain
sectors are permitted.
Device programming and erasure are initiated through command sequences. Once a program or erase operation begins, the host
system need only poll the DQ7 (Data# Polling) or DQ6 (toggle)
status bits
or monitor the
Ready/Busy# (RY/BY#)
output to
determine whether the operation is complete. To facilitate programming, an
Unlock Bypass
mode reduces command sequence
overhead by requiring only two write cycles to program data instead of four.
Hardware data protection
measures include a low V
CC
detector that automatically inhibits write operations during power
transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of
memory. This can be achieved in-system or via programming equipment.
The
Erase Suspend/Erase Resume
feature allows the host system to pause an erase operation in a given sector to read or
program any other sector and then complete the erase operation. The
Program Suspend/Program Resume
feature enables the
host system to pause a program operation in a given sector to read any other sector and then complete the program operation.
The
hardware RESET# pin
terminates any operation in progress and resets the device, after which it is then ready for a new
operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the
host system to read boot-up firmware from the Flash memory device.
The device reduces power consumption in the
standby mode
when it detects specific voltage levels on CE# and RESET#, or when
addresses are stable for a specified period of time.
The
Write Protect (WP#)
feature protects the first or last sector by asserting a logic low on the WP#/ACC pin or WP# pin, depending
on model number. The protected sector is still protected even during accelerated programming.
The
Secured Silicon Sector
provides a 128-word/256-byte area for code or data that can be permanently protected. Once this
sector is protected, no further changes within the sector can occur.
Cypress MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of
quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted
erase. The data is programmed using hot electron injection.
Document Number: 001-98525 Rev. *A
Page 3 of 83
S29GL064N, S29GL032N
Table of Contents
Distinctive Characteristics
.................................................. 2
General Description
............................................................. 3
1.
2.
3.
4.
5.
6.
7.
7.1
8.
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
8.15
8.16
8.17
9.
10.
10.1
10.2
10.3
10.4
Product Selector Guide
............................................... 5
Block Diagram..............................................................
5
Connection Diagrams..................................................
6
Pin Descriptions.........................................................
10
Logic Symbols
........................................................... 11
Ordering Information–S29GL032N
........................... 13
Ordering Information–S29GL064N
........................... 15
Valid Combinations ...................................................... 15
Device Bus Operations..............................................
Word/Byte Configuration..............................................
Requirements for Reading Array Data.........................
Writing Commands/Command Sequences..................
Standby Mode..............................................................
Automatic Sleep Mode.................................................
RESET#: Hardware Reset Pin.....................................
Output Disable Mode ...................................................
Autoselect Mode ..........................................................
Advanced Sector Protection ........................................
Lock Register ...............................................................
Persistent Sector Protection ........................................
Password Sector Protection.........................................
Password and Password Protection Mode Lock Bit ....
Persistent Protection Bit Lock (PPB Lock Bit)..............
Secured Silicon Sector Flash Memory Region ............
Write Protect (WP#/ACC) ............................................
Hardware Data Protection............................................
16
16
16
17
18
18
18
18
28
30
30
31
33
33
34
34
35
35
11.
12.
13.
Absolute Maximum Ratings.......................................
60
Operating Ranges
....................................................... 61
DC Characteristics......................................................
62
14. Test Conditions
........................................................... 63
14.1 Key to Switching Waveforms ........................................ 63
15.
16.
AC Characteristics......................................................
64
Erase And Programming Performance.....................
73
17. Physical Dimensions
.................................................. 75
17.1 TS048—48-Pin Standard Thin Small
Outline Package (TSOP) .............................................. 75
17.2 TS056—56-Pin Standard Thin Small
Outline Package (TSOP) .............................................. 76
17.3 VBK048—Ball Fine-pitch Ball
Grid Array (BGA) 8.15x 6.15 mm Package................... 77
17.4 LAA064—64-Ball Fortified Ball
Grid Array (BGA) 13 x 11 mm Package........................ 78
17.5 LAE064-64-Ball Fortified Ball
Grid Array (BGA) 9 x 9 mm Package............................ 79
18.
Revision History..........................................................
80
Common Flash Memory Interface (CFI)
................... 36
40
40
40
41
41
45
46
47
49
50
55
55
56
57
58
59
59
59
59
Page 4 of 83
Command Definitions................................................
Reading Array Data .....................................................
Reset Command ..........................................................
Autoselect Command Sequence .................................
Enter/Exit Secured Silicon Sector
Command Sequence ...................................................
10.5 Program Suspend/Program Resume
Command Sequence ...................................................
10.6 Chip Erase Command Sequence ................................
10.7 Sector Erase Command Sequence .............................
10.8 Erase Suspend/Erase Resume Commands ................
10.9 Command Definitions...................................................
10.10Write Operation Status ................................................
10.11DQ7: Data# Polling......................................................
10.12RY/BY#: Ready/Busy# ................................................
10.13DQ6: Toggle Bit I .........................................................
10.14DQ2: Toggle Bit II ........................................................
10.15Reading Toggle Bits DQ6/DQ2 ...................................
10.16DQ5: Exceeded Timing Limits .....................................
10.17DQ3: Sector Erase Timer ............................................
10.18DQ1: Write-to-Buffer Abort ..........................................
Document Number: 001-98525 Rev. *A
S29GL064N, S29GL032N
1.
Product Selector Guide
S29GL064N
V
CC
= 2.7–3.6 V
V
IO
= 2.7–3.6 V
V
IO
= 1.65–3.6 V
90
90
25
25
90
110
110
110
30
30
90
90
25
25
S29GL032N
90
110
110
110
30
30
Part Number
Speed Option
Max. Access Time (ns)
Max. CE# Access Time (ns)
Max. Page Access Time (ns)
Max. OE# Access Time (ns)
2. Block Diagram
RY/BY#
V
CC
V
SS
Sector Switches
DQ15
–
DQ0 (A-1)
Erase Voltage
Generator
RESET#
Input/Output
Buffers
WE#
WP#/ACC
BYTE#
State
Control
Command
Register
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data
Latch
CE#
OE#
STB
Y-Decoder
Y-Gating
Timer
Address Latch
V
CC
Detector
X-Decoder
Cell Matrix
A
Max
**–A0
Note
**A
MAX
GL064N = A21, GL032N = A20.
Document Number: 001-98525 Rev. *A
Page 5 of 83
