DATA SHEET
SBN0064G
Dot-matrix STN LCD
64-SEGMENT Driver with
64-row x 64-column Display
Data Memory
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products. Please contact Avant Electronics
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data sheet (v3)
2005 May 20
Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
1
1.1
GENERAL
Description
The SBN0064G is a 64-SEGMENT driver with 64-row x64 column (4096-bit) on-chip Display Data Memory. It is designed
to be paired with the SBN6400G 64-COMMON driver to drive a STN LCD panel.
The on-chip Display Data Memory is for storing display data. Dot-matrix mapping method is used. A “0” stored in the
Display Data Memory bit corresponds to an OFF-pixel on the LCD panel; a “1” stored in the Display Data Memory bit
corresponds to an ON-pixel on the LCD panel.
Display on the LCD panel is controlled by a host microcontroller. The interface between the host microcontroller and the
SBN0064G is composed of 8-bit, bi-directional data bus (DB0~DB7) and control signals R/W, E, and C/D.
The SBN0064G does not have oscillator circuit. It depends on the SBN6400G to supply clocks (CLK1, CLK2) and display
control signals (CL, M, FRM).
1.2
Features
•
64-SEGMENT STN LCD driver.
•
To be paired with the SBN6400G 64-COMMON Driver.
•
On-chip Display Data Memory: 64-row x 64-column (totally 4096 bits).
•
Dot-Matrix Mapping between the Display Data Memory bit and LCD pixel.
•
External LCD bias.
•
Display duty cycle: 1/32 ~1/64.
•
Normal mapping or Inverted mapping between SEGMENT outputs and Display Data Memory column outputs.
•
Easy interface with a 8-bit host microcontroller.
•
8-bit parallel data bus; READ/WRITE, Enable, and Command/Data control bus.
•
Programmable internal registers: Display ON/OFF, Display Start Line, Page Address, Column Address, and Status.
•
Display Data WRITE and display data READ.
•
Operating voltage range (V
DD
): 2.7 ~ 5.5 volts.
•
LCD bias voltage (V
LCD
=V
DD
- V5): 13 volts (max).
•
Negative power supply (V
NEG
=V
DD
-V
EE
): 16 volts (max).
•
Operating temperature range: -20 to +75
°C.
•
Storage temperature range: -55 to +125
°C.
2005 May 20
2 of 37
data sheet (v3)
Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
1.3
Ordering information
Ordering information
PRODUCT TYPE
DESCRIPTION
LQFP100 Pb-free package.
QFP100 Pb-free package.
LQFP100 general package.
QFP100 general package.
tested die.
Table 1
SBN0064G-LQFPG
SBN0064G-QFPG
SBN0064G-LQFP
SBN0064G-QFP
SBN0064G-D
2005 May 20
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data sheet (v3)
Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
2
2.1
FUNCTIONAL BLOCK DIAGRAM AND DESCRIPTION
Functional block diagram
SEG63
SEG62
SEG1
V5L
V3L
V2L
V0L
V
EE1
CSM
Display ON/OFF Register
Display Start Line Register
Page Address Register
Column Address Register
Status Register
SEG0
V5R
64 Output Drivers
64 Level Shifters
V3R
V2R
V0R
V
EE2
High Voltage Circuit
Mapping Circuit
Display Data RAM output latch
64 row x 64column
(4096 bits)
Display Data Memory
Line Address
Decoder
Column Address Decoder
Command
Decoder
Display Data RAM Access Control
Display
Control
Display Data
Read/Write
Control
Microcontroller
Interface
Clock and display control
FRM
M
CLK1
CS2B
CS1B
DB0~DB7
RSTB
Fig.1 Functional Block Diagram
2005 May 20
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CLK2
CS3
R/W
C/D
CL
E
data sheet (v3)
Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
3
3.1
PIN(PAD) ASSIGNMENT, PAD COORDINATES, SIGNAL DESCRIPTION
The SBN0064G pinning diagram (LQFP100)
DB2
DB3
DB4
DB5
DB6
DB7
NC
NC
NC
CS3
CS2B
CS1B
RSTB
R/W
C/D
CL
CLK2
CLK1
E
FRM
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
CSM
M
V
DD
V3R
V2R
V5R
V0R
V
EE2
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
DB1
DB0
V
SS
V3L
V2L
V5L
V0L
V
EE1
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SBN0064G
Fig.2 Pin assignment of LQFP100 package.
2005 May 20
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data sheet (v3)
