SL2S1412; SL2S1512;
SL2S1612
ICODE ILT-M
Rev. 3.2 — 8 October 2013
167732
Product data sheet
COMPANY PUBLIC
1. General description
The ISO 18000-3 mode 3/EPC Class-1 HF standard allows the commercialized provision
of mass adoption of HF RFID technology for passive smart tags and labels. Main fields of
applications are supply chain management and logistics for worldwide use.
The ICODE ILT-M is a dedicated chip for passive, intelligent tags and labels supporting
the ISO 18000-3 mode 3 RFID standard. It is especially suited for applications where
reliable identification and high anti-collision rates are required.
The ICODE ILT-M is a product out of the NXP Semiconductors ICODE product family. The
entire ICODE product family offers anti-collision functionality. This allows a reader to
simultaneously operate multiple labels/tags within its antenna field. A ICODE ILT-M based
label/tag requires no external power supply.
Its contactless interface generates the power supply via the antenna circuit by inductive
energy transmission from the interrogator (reader), while the system clock is extracted
from the magnetic field. Data transmitted from interrogator to label/tag is demodulated by
the interface, and it also modulates the interrogator's magnetic field for data transmission
from label/tag to interrogator. A label/tag can be operated without the need for line of sight
or battery, as long as it is connected to a dedicated antenna for the targeted frequency
range. When the label/tag is within the interrogator's operating range, the high-speed
wireless interface allows data transmission in both directions.
2. Features and benefits
2.1 Key features
512-bit user memory
Up to 240-bit of EPC memory
96-bit tag identifier (TID) including 48-bit unique serial number
EAS (Electronic Article Surveillance) functionality
Recommissioning feature (privacy) with 32-bit kill password
32-bit access password to allow a transition into the secured state
Long read/write ranges due to extremely low-power design
Reliable operation of multiple tags due to advanced anti-collision (up to 800 tags/s)
Fast initialization (write EPC)
Forward link: 25 kbit/s to 100 kbit/s
Return link: 53 kbit/s to 848 kbit/s
NXP Semiconductors
SL2S1412; SL2S1512; SL2S1612
ICODE ILT-M
2.2 Key benefits
High sensitivity provides long read range
Highly advanced anti-collision resulting in highest identification speed
Reliable and robust RFID technology suitable noisy environments and dense label
populations
2.3 Custom features
EAS
Enables the HF RFID tag to be used as EAS tag without the need for a backend data
base.
3. Applications
Healthcare and pharmaceutical supply chain
Medical lab automation
Document tracking
Casino chips
Laundry automation
4. Ordering information
Table 1.
Ordering information
Package
Name
SL2S1412FUD
SL2S1512FUD
SL2S1612FUD
SL2S1512FTB
Wafer
Wafer
Wafer
XSON3
Description
Version
sawn, bumped wafer, 120
m,
on film frame carrier, -
C
i
between LA and LB = 0 pF (typical)
sawn, bumped wafer, 120
m,
on film frame carrier, -
C
i
between LA and LB = 23.5 pF (typical)
sawn, bumped wafer, 120
m,
on film frame carrier, -
C
i
between LA and LB = 97 pF (typical)
plastic extremely thin small outline package; no
leads; 3 terminals; body 1 x 1.45 x 0.5 mm;
C
i
between LA and LB = 23.5 pF (typical)
SOT1122
Type number
SL2S1412_SL2S1512_SL2S1612
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.2 — 8 October 2013
167732
2 of 29
NXP Semiconductors
SL2S1412; SL2S1512; SL2S1612
ICODE ILT-M
5. Block diagram
The SL2S1412; SL2S1512; SL2S1612 IC consists of three major blocks:
- Analog RF Interface
- Digital Controller
- EEPROM
The analog part provides stable supply voltage and demodulates data received from the
reader for being processed by the digital part. Further, the modulation transistor of the
analog part transmits data back to the reader.
The digital section includes the state machines, processes the protocol and handles
communication with the EEPROM, which contains the EPC and the user data.
ANALOG
RF INTERFACE
VREG
PAD
VDD
DIGITAL CONTROL
EEPROM
ANTICOLLISION
RECT
DEMOD
data
in
READ/WRITE
CONTROL
ANTENNA
MOD
PAD
data
out
ACCESS CONTROL
MEMORY
EEPROM INTERFACE
CONTROL
PAD
VDD
PAD
OUT
I/O
CONTROL
RF INTERFACE
CONTROL
R/W
SEQUENCER
CHARGE PUMP
001aai335
Fig 1.
Block diagram
SL2S1412_SL2S1512_SL2S1612
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.2 — 8 October 2013
167732
3 of 29
NXP Semiconductors
SL2S1412; SL2S1512; SL2S1612
ICODE ILT-M
6. Pinning information
LA
2
1
LB
3
n.c.
aaa-009401
Transparent top view
Fig 2.
Table 2.
Pin
1
2
3
Pin configuration for SOT1122
Pin description SOT1122
Symbol
LB
LA
n.c.
Description
antenna RF input
antenna RF input
not connected
SL2S1412_SL2S1512_SL2S1612
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.2 — 8 October 2013
167732
4 of 29
NXP Semiconductors
SL2S1412; SL2S1512; SL2S1612
ICODE ILT-M
7. Wafer layout
LA
LB
GND
TEST
not to scale
001aam246
Fig 3.
Wafer SL2S1412FUD and SL2S1512FUD layout and pin configuration for the bare
die
SL2S1412_SL2S1512_SL2S1612
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.2 — 8 October 2013
167732
5 of 29
