SL74LS164
8-Bit Serial-Input/Parallel-Output
Shift Register
This 8-bit shift register features gated serial inputs and an
asynchronous reset. The gated serial inputs (A and B) permit complete
control over incoming data as a low at either (or both) input(s) inhibits
entry of the new data and resets the first flip flop to the low level at the
next clock pulse. A high level input enables the other input which will
then determine the state of the first flip-flop. Data at the serial inputs
may be changed while the clock is high or low, but only information
meeting the setup requirements will be entered clocking occurs or the
low-to-high level transition of the clock input. All inputs are diode-
clamped to minimize transmission-line effects.
•
Gated (Enable/Disable) Serial Inputs
•
Fully Buffered Clock and Serial Inputs
•
Asynchronous Clear
ORDERING INFORMATION
SL74LS164N Plastic
SL74LS164D SOIC
T
A
=0° to 70°C
for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Reset
L
H
H
PIN 14 =V
CC
PIN 7 = GND
H
H
Clock
X
A1 A2
X X
X X
H D
D H
L L
Outputs
Q
A
Q
B
... Q
H
L
L ... L
no change
D Q
An
... Q
Gn
D Q
An
... Q
Gn
L Q
An
... Q
Gn
D = data input
X = don’t care
Q
An
- Q
Gn
= data shifted from the previous stage on a
rising edge at the clock input.
SLS
System Logic
Semiconductor
SL74LS164
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
Tstg
*
Parameter
Supply Voltage
Input Voltage
Output Voltage
Storage Temperature Range
Value
7.0
7.0
5.5
-65 to +150
Unit
V
V
V
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
f
clock
t
su
t
h
t
w
t
w
t
rec
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Ambient Temperature Range
Clock Frequency
Setup Time, A1 or A2 to Clock
Hold Time, Clock to A1 or A2
Pulse Width, Clock
Pulse Width, Reset
Recovery Time
0
0
15
5
20
20
5
Parameter
Min
4.75
2.0
0.8
-0.4
8.0
+70
25
Max
5.25
Unit
V
V
V
mA
mA
°C
MHz
ns
ns
ns
ns
ns
DC ELECTRICAL CHARACTERISTICS
over full operating conditions
Guaranteed Limit
Symbol
V
IK
V
OH
V
OL
Parameter
Input Clamp Voltage
High Level Output Voltage
Low Level Output Voltage
Test Conditions
V
CC
= min, I
IN
= -18 mA
V
CC
= min, I
OH
= -0.4 mA
V
CC
= min, I
OL
= 4 mA
V
CC
= min, I
OL
= 8 mA
I
IH
High Level Input Current
V
CC
= max, V
IN
= 2.7 V
V
CC
= max, V
IN
= 7.0 V
I
IL
I
O
I
CC
Low Level Input Current
Output Short Circuit Current
Supply Current
V
CC
= max, V
IN
= 0.4 V
V
CC
= max, V
O
= 0 V
(Noote 1)
V
CC
= max (Note 2)
-20
2.7
0.4
0.5
20
0.1
-0.4
-100
27
mA
mA
mA
mA
mA
Min
Max
-1.5
Unit
V
V
V
Note 1: Not more than one output should be shorted at a time, and duration should not exceed one second.
SLS
System Logic
Semiconductor
SL74LS164
Note 2: I is measured with outputs open, serial inputs grouned, the clock input at 2.4 V, and a momentary
CC
ground, then 4.5 V applied.
AC ELECTRICAL CHARACTERISTICS
(T
A
=25°C, V
CC
= 5.0 V, C
L
= 15 pF, R
L
= 2 kΩ, t
r
=15
ns, t
f
= 6.0 ns)
Symbol
t
PLH
t
PHL
t
PHL
t
su
t
h
t
w
t
w
Parameter
Propagation Delay Time, Clock to Q
Propagation Delay Time, Clock to Q
Propagation Delay Time, Reset to Q
Setup Time, A1 or A2 to Clock
Hold Time, Clock to A1 or A2
Pulse Width, Clock
Pulse Width, Reset
15
5
20
20
Min
Max
27
32
36
Unit
ns
ns
ns
ns
ns
ns
ns
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
NOTES A. C
L
includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 3. Switching Waveform
Figure 4. Test Circuit
SLS
System Logic
Semiconductor
SL74LS164
TIMING DIAGRAM
SLS
System Logic
Semiconductor
