SUMMIT
MICROELECTRONICS, Inc.
SMH4042
Hot Swap™ Controller
FEATURES
• Full Voltage Control for Hot Swap Applications
CompactPCI
High Availability Compatible
-
On-board 15V High Side Driver Generation
Allows use of Low On-resistance N-Channel FETS
DESCRIPTION
The SMH4042 is a fully integrated hot swap controller that
provides complete power control for add-in cards ranging
in use for basic hot swap systems to high availability
systems. It detects proper insertion of the card and
senses valid supply voltage levels at the backplane.
Utilizing external low on-resistance N-channel
MOSFETs, card power is ramped by two high-side driver
outputs that are slew-rate limited at 250V/s.
The SMH4042 continuously monitors the host supplies,
the add-in card supplies and the add-in card current. If the
SMH4042 detects the current is higher than the pro-
grammed value it will shut down the MOSFETs and issue
a fault status back to the host.
The on board E
2
PROM can be used as configuration
memory for the individual card or as general purpose
memory. The proprietary DataDownload mode provides
a more direct interface to the E
2
PROM, simplifying access
by the add-in card’s controller or ASIC.
-
Undervoltage Lockout
-
Electronic Circuit Breakers
- Card Insertion Detection
- Host VCC Detection
- Card Voltage Sequencing
• Flexible Reset Control
- Low Voltage Resets
- Host Reset Filtering
- Soft Reset
• Adjustable Power-on Slew Rate
• Supports Mixed Voltage Cards
• Integrated 4K Bit 2-Wire E
2
PROM Memory
- Data Download™ Mode [Simplifies
Downloading of Configuration Memory into
Interface ASIC or MCU]
APPLICATIONS
•
CompactPCI
Hot Swap Control
• VME Live Insertion Control
FUNCTIONAL BLOCK DIAGRAM
VCC5
BD_SEL1#
BD_SEL2#
CBI_3
50mV
-
+
Charge
Pump
Ref
Voltage
-
+
-
+
-
EEPROM
Memory
Array
CBI_5
50mV
A0
A1
A2
SDA
SCL
ASSOCIATE
MEMBER
+
_
HST_3V_MON
FAULT#
PCI_RST#
PWR_EN
SGNL_VLD#
HEALTHY#
+
-
1.25V
EL
VS
SUMMIT MICROELECTRONICS, Inc.
•
300 Orchard City Drive, Suite 131
•
Campbell, CA 95008
IS
LE
W
© SUMMIT MICROELECTRONICS, Inc. 1999
2037-07 9/23/99
+
1Vref
Slew Rate
Control
VGATE3
VGATE5
DRVREN#
+
_
Control
Circuitry
LOCAL_PCI_RST#
LOCAL_PCI_RST
CARD_5V_MON
+
-
CARD_3V_MON
2037 ILL2.2
•
Telephone 408-378-6461
•
Fax 408-378-6586
•
www.summitmicro.com
Characteristics subject to change without notice
1
SMH4042
PIN CONFIGURATIONS SOIC and SSOP
Symbol
CBI_5
DRVREN#
ISLEW
FAULT#
1Vref
VSEL
PWR_EN
A0
LOCAL_PCI_RST#
A1
A2
BD_SEL2#
BD_SEL1#
GND
HEALTHY#
SGNL_VLD#
PCI_RST#
SDA
SCL
LOCAL_PCI_RST
CARD_3V_MON
VGATE3
HST_3V_MON
CBI_3
CARD_5V_MON
NC
VGATE5
V
CC
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Description
Circuit Breaker Input (5V)
High Side Driver Enable
Slew Rate Control
Fault Output Active Low
1Volt Reference Output
Voltage Select Input
Power On Enable Input
Memory Address 0
(NC or Gnd)
Back End Reset Output
(Active Low)
Memory Address 1
Memory Address 2
Board Select 2
Board Select 1
Ground
Backend Power On
Signals Valid Output
Host reset input
Serial Data I/O
Serial Clock Input
Back End Reset
Output
(Active High)
Card-side 3 Volt
Monitor Input
High Side Drive Output
Host 3V Monitor Input
Circuit Breaker Input (3V)
Card-side 5 Volt
Monitor Input
No Connect
High Side Drive Output
Supply Voltage
2037 PGM T1.2
CBI_5
DRVREN#
ISLEW
FAULT#
1Vref
VSEL
PWR_EN
A0
LOCAL_PCI_RST#
A1
A2
BD_SEL2#
BD_SEL1#
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
VGATE5
NC
CARD_5V_MON
CBI_3
HST_3V_MON
VGATE3
CARD_3V_MON
LOCAL_PCI_RST
SCL
SDA
PCI_RST#
SGNL_VLD#
HEALTHY#
2037 ILL1.2
RECOMMENDED OPERATING CONDITIONS
Condition
Temperature
V
CC
Min
-40°C
2.7V
Max
+85°C
5.5V
2037 PGM T2.0
2037-07 9/23/99
2
SMH4042
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias
Storage Temperature
Voltage on :
HST_3V_MON, CARD_3V_MON
V
CC
, CARD_5V_MON
SGNL_VLD#, HEALTHY# &
LOCAL_PCI_RESET#
VGATE3, VGATE5, DRVREN#
RESET
All Others
Output Short Circuit Current
Lead Solder Temperature (10 secs)
-55°C to +125°C
-65°C to +150°C
7V
7V
16V
V
CC
+.7V
V
CC
+.7V
100mA
300°C
*COMMENT
Stresses listed under Absolute Maximum Ratings
may cause permanent damage to the device. These
are stress ratings only, and functional operation of
the device at these or any other conditions outside
those listed in the operational sections of this speci-
fication is not implied. Exposure to any absolute
maximum rating for extended periods may affect
device performance and reliability.
DC ELECTRICAL CHARACTERISTICS T
A
= -40
°
C to +85
°
C
Symbol
V
CC
I
CC1
I
CC2
V
TRIP
Parameter
Operating Voltage
Power Supply Current
Power Supply Current
V
TRIP
Threshold Levels
See Note 1
Operating
Writing
V
CC
5
V
CC
5
HST_3V_MON
HST_3V_MON
HST_3V_MON
HST_3V_MON
CARD_5V_MON
CARD_5V_MON
CARD_3V_MON
CARD_3V_MON
V
TRHST
I
LI
I
LO
V
IL
V
IH
V
OL
V
OH
V
OLRS
V
OHRS
V
OHVG
V
REF
V
CB
Trip Point Hysteresis
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage, V
CC
= 5.0V, I
OL
= 2.1mA
Output High Voltage, V
CC
= 5.0V, I
OH
= -400µA
LOCAL_PCI_RESET# Output Low Voltage, I
OL
= 3.2mA
RESET Output High, I
OH
= -800µA
VGATE3, VGATE5 Output Voltage, I
OH
= 20µA
Reference Output Voltage, No Load
Circuit Breaker Trip Voltage, V
CB
(V
CC
-CBI_5) or
V
CB
=(HST_3V_MON-CBI_3)
-0.1
2
2.4
0.4
V
CC-.75V
13
0.95
40
14
1
50
15
1.05
60
A
B
G
H
K
L
M
N
M
N
Part no.
Suffix
Min.
1
500
4.250
4.50
2.57
2.72
2.87
3.0
4.375
4.625
2.65
2.8
2.95
3.1
V
CC
5 V
TRIP
+50mV
V
CC
5 V
TRIP
-50mV
HST_3V_MON
+50mV
HST_3V_MON
-50mV
7
2
10
0.8
V
CC+1V
0.4
3
4.50
4.75
2.72
2.87
3.0
3.17
Typ.
Max.
Units
V
µA
mA
V
V
V
V
V
V
V
V
V
V
mV
µA
µA
V
V
V
V
V
V
V
V
mV
2037 PGM T3.4
Notes:
1. The SMH4042 will drive the reset outputs and voltage control signals to valid levels throughout the operating range of 1V to 5.5V.
The balance of the logic will not be guaranteed operational unless V
CC
is greater than 2.7V.
2. Refer to the ordering information table for all valid combinations of options.
2037-07 9/23/99
3
SMH4042
SEQUENCER AC OPERATING CHARACTERISTICS (Over Recommended Operating Conditions)
Symbol
t
VTPD
t
VTR
t
PRLPR
V
RVALID
T
SLEW
T
HSE
t
PURST
t
GLTICH
t
OCF
t
OCVG
t
CBTC
Parameter
V
TRIP
to Power Down Delay
V
TRIP
to RESET Output Delay
PCI_RST# to LOCAL_PCI_RST#
RESET Output Valid
Slew Rate
BD-SEL# to Power-on Delay
Reset Timeout
Glitch Reject Pulse Width
Over-current to FAULT#
Over-current to VGATE Off
Circuit Breaker Time Constant
Powering-on
Operating
1
1
4
16
BD_SEL# Noise filter
100
100
150
150
1
250
200
200
40
Notes
Host Voltage Input
Card Voltage Input
Min.
Typ.
1
1
.1
Max.
5
5
1
Units
µs
µs
µs
V
V/Sec
ms
ms
ns
µs
µs
µs
µs
2037 PGM T4.1
VCC
&
HST_3V_MON
V
TRIP
V
RVALID
LOCAL_PCI_RST#
RESET
BD_SEL1#
+
BD_SEL2#
t
HSE
VGATE5 & VGATE3
t
SLEW
DRVREN#
CARD_5V_MON
&
CARD_3V_MON
V
OHVG
V
TRIP
t
PURST
HEALTHY#
SGNL_VLD#
2037 ILL3.0
Card Insertion Timing Diagram
2037-07 9/23/99
4
SMH4042
VCC
or
HST_3V_MON
V
TRIP
t
VTPD
SGNL_VLD#
&
DRVREN#
VGATE5
&
VGATE3
CARD_5V_MON
or
CARD_3V_MON
V
TRIP
t
VTR
LOCAL_PCI_RST#
&
HEALTHY#
2037 ILL4.0
Loss of Voltage Timing Sequence
PCI_RST#
t
PRLPR
t
PURST
LOCAL_PCI_RST#
t
PURST
RESET
2037 ILL5.0
Host Initiated Reset Timing Diagram
t
CBTC
CBI_5 or CBI_3
FAULT#
VGATE5 & VGATE3
PCI_RST#
2037 ILL6.0
Circuit Breaker Timing Diagram
2037-07 9/23/99
5
