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SMP04EQ

4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9us ACQUISITION TIME, CDIP16, CERDIP-16

器件类别：模拟混合信号IC    放大器电路   

厂商名称：Rochester Electronics

厂商官网：https://www.rocelec.com/

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Rochester Electronics
零件包装代码
DIP
包装说明
CERDIP-16
针数
16
Reach Compliance Code
unknow
最长采集时间
11 µs
标称采集时间
9 µs
放大器类型
SAMPLE AND HOLD CIRCUIT
最大模拟输入电压
7.5 V
最小模拟输入电压
-7.5 V
最大下降率
0.025 V/s
JESD-30 代码
R-GDIP-T16
JESD-609代码
e0
长度
19.05 mm
湿度敏感等级
NOT SPECIFIED
负供电电压上限
-8.5 V
标称负供电电压 (Vsup)
-5 V
功能数量
4
端子数量
16
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
CERAMIC, GLASS-SEALED
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度（摄氏度）
NOT APPLICABLE
认证状态
COMMERCIAL
采样并保持/跟踪并保持
SAMPLE
座面最大高度
5.08 mm
供电电压上限
8.5 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN LEAD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT APPLICABLE
宽度
7.62 mm
文档预览
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SMP04–SPECIFICATIONS
(@ V
DD
= +12.0 V, V
SS
= DGND = 0 V, R
L
= No Load, T
A
= Operating Temperature Range
specified in Absolute Maximum Ratings, unless otherwise noted.)
Parameter
Linearity Error
Buffer Offset Voltage
Hold Step
Droop Rate
Output Source Current
1
Output Sink Current
1
Output Voltage Range
LOGIC CHARACTERISTICS
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
DYNAMIC PERFORMANCE
Acquisition Time
3
Acquisition Time
3
Hold Mode Settling Time
Slew Rate
4
Capacitive Load Stability
Analog Crosstalk
SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio
Supply Current
Power Dissipation
2
ELECTRICAL CHARACTERISTICS
Symbol
V
OS
V
HS
∆V/∆t
I
SOURCE
I
SINK
OVR
Conditions
V
IN
= 6 V
V
IN
= 6 V, T
A
= +25°C to +85°C
V
IN
= 6 V, T
A
= –40°C
V
IN
= 6 V, T
A
= +25°C
V
IN
= 6 V
V
IN
= 6 V
R
L
= 20 kΩ
R
L
= 10 kΩ
Min
–10
Typ
0.01
±
2.5
2.5
2
Max
+10
4
5
25
10.0
9.5
Units
%
mV
mV
mV
mV/s
mA
mA
V
V
V
V
µA
µs
µs
µs
µs
V/µs
pF
dB
dB
mA
mW
1.2
0.5
0.06
0.06
2.4
0.5
V
INH
V
INL
I
IN
t
AQ
t
AQ
t
H
SR
C
L
T
A
= +25°C, 0 V to 10 V Step to 0.1%
–40°C
≤
T
A
≤
+85°C
T
A
= +25°C, 0 V to 10 V Step to 0.01%
To 1 mV
R
L
= 20 kΩ
<30% Overshoot
0 V to 10 V Step
10.8 V
≤
V
DD
≤
13.2 V
0.8
1
4.25
5.25
3
3.5
3.75
9
1
4
500
–80
75
4
PSRR
I
DD
P
DIS
60
7
84
= +5.0 V, V
SS
= –5.0 V, DGND = 0.0 V, R
L
= No Load, T
A
= Operating Temperature
Range specified in Absolute Maximum Ratings, unless otherwise noted.)
DD
ELECTRICAL CHARACTERISTICS
(@ V
Parameter
Symbol
V
OS
V
HS
∆V/∆t
R
OUT
I
SOURCE
I
SINK
OVR
V
INH
V
INL
I
IN
t
AQ
t
AQ
t
H
SR
C
L
PSRR
I
DD
P
DIS
Conditions
V
IN
= 0 V
V
IN
= 0 V, T
A
= +25°C to +85°C
V
IN
= 0 V, T
A
= –40°C
V
IN
= 0 V, T
A
= +25°C
V
IN
= 0 V
V
IN
= 0 V
R
L
= 20 kΩ
Min
–10
Typ
0.01
±
2.5
2.5
2
1
Max
+10
4
5
25
Units
%
mV
mV
mV
mV/s
Ω
mA
mA
V
V
V
µA
µs
µs
µs
V/µs
pF
dB
mA
mW
Linearity Error
Buffer Offset Voltage
Hold Step
Droop Rate
Output Resistance
Output Source Current
1
Output Sink Current
1
Output Voltage Range
LOGIC CHARACTERISTICS
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
DYNAMIC PERFORMANCE
Acquisition Time
3
Acquisition Time
3
Hold Mode Settling Time
Slew Rate
5
Capacitive Load Stability
2
1.2
0.5
–3.0
2.4
0.5
+3.0
0.8
1
11
–3 V to +3 V Step to 0.1%
–3 V to +3 V Step to 0.01%
To 1 mV
R
L
= 20 kΩ
<30% Overshoot
±
5 V
≤
V
DD
≤ ±
6 V
3.6
9
1
3
500
60
75
3.5
SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio
Supply Current
Power Dissipation
5.5
55
NOTES
1
Outputs are capable of sinking and sourcing over 20 mA, but linearity and offset are guaranteed at specified load levels.
2
All input control signals are specified with t
R
= t
F
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
3
This parameter is guaranteed without test.
4
Slew rate is measured in the sample mode with a 0 V to 10 V step from 20% to 80%.
5
Slew rate is measured in the sample mode with a –3 V to +3 V step from 20% to 80%.
Specifications are subject to change without notice.
–2–
REV. D
SMP04
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C unless otherwise noted)
Package Type
16-Lead Cerdip
16-Lead Plastic DIP
16-Lead SO
*
JA
JA
*
JC
Units
°C/W
°C/W
°C/W
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, 17 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.7 V, 17 V
V
LOGIC
to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
V
IN
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
V
OUT
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Analog Output Current . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
(Not Short-Circuit Protected)
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
DD
+ 0.3 V
Operating Temperature Range
EQ, EP, ES . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
94
76
92
12
33
27
is specified for worst case mounting conditions, i.e.,
JA
is specified for device
in socket for cerdip and plastic DIP packages;
JA
is specified for device soldered
to printed circuit board for SO package.
CAUTION
1. Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; function operation
at or above this specification is not implied. Exposure to the above maximum
rating conditions for extended periods may affect device reliability.
2. Digital inputs and outputs are protected; however, permanent damage may
occur on unprotected units from high energy electrostatic fields. Keep units in
conductive foam or packaging at all times until ready to use. Use proper antistatic
handling procedures.
3. Remove power before inserting or removing units from their sockets.
PIN CONNECTIONS
16-Lead Cerdip
16-Lead Plastic DIP
16-Lead SO
V
OUT2
1
V
OUT1
2
V
IN1
3
NC 4
16 V
DD
15 V
OUT3
14 V
OUT4
ORDERING GUIDE
Model
SMP04EQ
SMP04EP
SMP04ES
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
Description
Cerdip-16
PDIP-16
SO-16
Package
Options*
Q-16
N-16
R-16A
13 V
SS
TOP VIEW
V
IN2
5 (Not to Scale) 12 V
IN4
S/H
1
6
S/H
2
7
DGND 8
11 V
IN3
10
S/H
4
9
S/H
3
SMP04
*Q = Cerdip; N = Plastic DIP; R = Small Outline.
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SMP04 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. D
–3–
SMP04
V
OUT1
V
OUT2
V
DD
V
OUT3
V
OUT4
V
IN1
V
IN2
V
SS
V
IN4
V
IN3
S/H
1
S/H
2
DGND
S/H
3
S/H
4
Dice Characteristics
Die Size: 0.80 x 0.120 mil = 9,600 sq. mil
(2.032 x 3.048mm = 6.193 sq. mm)
WAFER TEST LIMITS
Parameter
Buffer Offset Voltage
Hold Step
Droop Rate
Output Source Current
Output Sink Current
Output Voltage Range
(@ V
DD
= +12 V, V
SS
= DGND = 0 V, R
L
= No Load, T
A
= +25 C, unless otherwise noted.)
Symbol
V
OS
V
HS
∆V/∆t
I
SOURCE
I
SINK
OVR
Conditions
V
IN
= +6 V
V
IN
= +6 V
V
IN
= +6 V
V
IN
= +6 V
V
IN
= +6 V
R
L
= 20 kΩ
R
L
= 10 kΩ
SMP04G
Limits
±
10
±
4
25
1.2
0.5
0.06/10.0
0.06/9.5
2.4
0.8
1
10.8 V
≤
V
DD
≤
13.2 V
60
7
84
Units
mV max
mV max
mV/s max
mA min
mA min
V min/max
V min/max
V min
V max
µA
max
dB min
mA max
mW max
LOGIC CHARACTERISTICS
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio
Supply Current
Power Dissipation
V
INH
V
INL
I
IN
PSRR
I
DD
P
DIS
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
–4–
REV. D
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参数对比
与SMP04EQ相近的元器件有：SMP04EPZ、SMP04ESZ、SMP04EP、SMP04ES。描述及对比如下：
型号 SMP04EQ SMP04EPZ SMP04ESZ SMP04EP SMP04ES
描述 4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9us ACQUISITION TIME, CDIP16, CERDIP-16 4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9 us ACQUISITION TIME, PDIP16, PLASTIC, DIP-16 4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9 us ACQUISITION TIME, PDSO16, ROHS COMPLIANT, SOIC-16 4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9us ACQUISITION TIME, PDIP16, PLASTIC, DIP-16 4 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 9 us ACQUISITION TIME, PDSO16, SOIC-16
是否无铅 含铅 不含铅 不含铅 含铅 含铅
是否Rohs认证 不符合 符合 符合 不符合 不符合
厂商名称 Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics
零件包装代码 DIP DIP SOIC DIP SOIC
包装说明 CERDIP-16 DIP, SOP, PLASTIC, DIP-16 SOP,
针数 16 16 16 16 16
Reach Compliance Code unknow unknown unknown unknown unknown
最长采集时间 11 µs 11 µs 11 µs 11 µs 11 µs
标称采集时间 9 µs 9 µs 9 µs 9 µs 9 µs
放大器类型 SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT
最大模拟输入电压 7.5 V 7.5 V 7.5 V 7.5 V 7.5 V
最小模拟输入电压 -7.5 V -7.5 V -7.5 V -7.5 V -7.5 V
最大下降率 0.025 V/s 0.025 V/s 0.025 V/s 0.025 V/s 0.025 V/s
JESD-30 代码 R-GDIP-T16 R-PDIP-T16 R-PDSO-G16 R-PDIP-T16 R-PDSO-G16
JESD-609代码 e0 e3 e3 e0 e0
长度 19.05 mm 20.13 mm 9.9 mm 20.13 mm 9.9 mm
湿度敏感等级 NOT SPECIFIED NOT APPLICABLE 1 NOT APPLICABLE 1
负供电电压上限 -8.5 V -8.5 V -8.5 V -8.5 V -8.5 V
标称负供电电压 (Vsup) -5 V -5 V -5 V -5 V -5 V
功能数量 4 4 4 4 4
端子数量 16 16 16 16 16
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C
封装主体材料 CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 DIP DIP SOP DIP SOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 IN-LINE IN-LINE SMALL OUTLINE IN-LINE SMALL OUTLINE
峰值回流温度（摄氏度） NOT APPLICABLE NOT APPLICABLE 260 NOT APPLICABLE 240
认证状态 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
采样并保持/跟踪并保持 SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE
座面最大高度 5.08 mm 5.33 mm 1.75 mm 5.33 mm 1.75 mm
供电电压上限 8.5 V 8.5 V 8.5 V 8.5 V 8.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V
表面贴装 NO NO YES NO YES
技术 CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 TIN LEAD MATTE TIN MATTE TIN TIN LEAD TIN LEAD
端子形式 THROUGH-HOLE THROUGH-HOLE GULL WING THROUGH-HOLE GULL WING
端子节距 2.54 mm 2.54 mm 1.27 mm 2.54 mm 1.27 mm
端子位置 DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT APPLICABLE NOT APPLICABLE 40 NOT APPLICABLE 30
宽度 7.62 mm 7.62 mm 3.9 mm 7.62 mm 3.9 mm
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