1. Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB.
θ
JA
uses 4-layer
in still-air, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. V
IH
(min.) not lower than 1.2V.
Parameter
Output HIGH Voltage
Output Voltage Swing
Differential Voltage Swing
Output Source Impedance
Condition
Q0, /Q0; Q1, /Q1
Q0, /Q0; Q1, /Q1; see Figure 1a.
Q0, /Q0; Q1, /Q1; see Figure 1b.
Q0, /Q0; Q1, /Q1
Min
V
CC
–0.020
325
650
40
Typ
Max
V
CC
Units
V
mV
mV
Ω
400
800
50
500
1000
60
M9999-082604
hbwhelp@micrel.com or (408) 955-1690
3
Micrel
Precision Edge™
SY58023U
AC ELECTRICAL CHARACTERISTICS
(6)
V
CC
= 2.5V
±5%
or 3.3V
±10%;
R
L
= 100Ω across each output pair; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
f
MAX
t
pd
t
SKEW
Parameter
Maximum Operating Frequency
Condition
V
IN
≥
100mV; V
OUT
≥
200mV
IN-to-Q
SEL-to-Q
Channel-to-Channel Skew
(Within Bank)
Part-to-Part Skew
t
JITTER
Clock
Data
Cycle-to-Cycle Jitter
Total Jitter
Random Jitter
Deterministic Jitter
Crosstalk Induced Jitter
(Adjacent Channel)
t
r
, t
f
Notes:
6. Measured with 100mV input swing. High frequency AC-parameters are guaranteed by design and characterization.
7. Skew is measured between outputs of the same bank under identical transitions.
8. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
9. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, T
n
–T
n–1
where T is the time between rising edges of the output
signal.
10. Total jitter definition: With an ideal clock input of frequency
≤
f
MAX
, no more than one output edge in 10
12
output edges will deviate by more than the
specified peak-to-peak jitter value.
11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps–3.2Gbps.
12. Deterministic jitter is measured at 2.5Gbps–3.2Gbps with both K28.5 and 2
23
–1 PRBS pattern.
13. Crosstalk induced jitter is defined as the added jitter that results from signals applied to two adjacent channels. It is measured at the output while
applying similar, differential clock frequencies that are asynchronous with respect to each other at inputs.
