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SY89420VJCTR

5V/3.3V DUAL PHASE LOCKED LOOP

器件类别:模拟混合信号IC    信号电路   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Microchip(微芯科技)
包装说明
PLASTIC, LCC-28
Reach Compliance Code
_compli
其他特性
IT CAN ALSO OPERATE FROM A 4.75V TO 5.25V SUPPLY
模拟集成电路 - 其他类型
PHASE LOCKED LOOP
JESD-30 代码
S-PQCC-J28
JESD-609代码
e0
长度
11.48 mm
湿度敏感等级
1
功能数量
2
端子数量
28
最高工作温度
85 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装等效代码
LDCC28,.5SQ
封装形状
SQUARE
封装形式
CHIP CARRIER
峰值回流温度(摄氏度)
240
电源
3.3/5 V
认证状态
Not Qualified
座面最大高度
4.57 mm
最大供电电压 (Vsup)
3.465 V
最小供电电压 (Vsup)
3.135 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
温度等级
OTHER
端子面层
Tin/Lead (Sn85Pb15)
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
30
宽度
11.48 mm
文档预览
5V/3.3V DUAL
PHASE LOCKED LOOP
ClockWorks™
SY89420V
FINAL
FEATURES
s
3.3V and 5V power supply options
s
1.12GHz maximum VCO frequency
s
30MHz to 560MHz reference input operating
frequency
s
s
s
s
Frequency doubler mode
Low jitter design
PECL differential outputs
PECL and TTL reference voltages available
DESCRIPTION
The SY89420V device consists of two identical, low
jitter, digital Phase Locked Loops based on Micrel-Synergy's
differential PLL technology. Each of the PLLs (PLLA and
PLLB) is capable of operating in the 30MHz to 560MHz
input reference frequency range independently of the other
and is configurable separately. The PLLs can be configured
to be matched in all regards, or can be configured so that
PLLB is used as a frequency doubler, while PLLA is used
to regenerate the undoubled frequency.
Two reference inputs (RINX and RINX), two feedback
inputs (FINX and FINX), two filter pins (F1X and F2X) and
two differential outputs (FOUTX and FOUTX) are provided
for each of the two PLLs. The reference and feedback
inputs can be used as either differential or single-ended
inputs. In single-ended mode RINX and FINX can be
connected to either V
BB
for normal 100K PECL levels or
V
TH
for normal TTL levels.
Feedback for the loops is realized by connecting FOUTX,
FOUTX to FINX, FINX by means of external circuitry. This
allows the user the flexibility of inserting additional circuitry
off-chip in the feedback paths, such as a divider. Pulldown
resistors are required for the FOUTX and FOUTX pins.
Use of a phase-frequency detector results in excellent
PLL locking and tracking characteristics. Error correction
voltages are generated by the detector if either phase or
frequency deviations occur. The VCO has a frequency
range covering more than a 2:1 ratio from 480MHz to
1120MHz.
Select pins S1X and S2X are used to program the N
dividers for optimum VCO operation, in other words with
the VCO in the center of its range. Additional select pins,
S3B and S4B, are provided for PLLB. When both S3B and
S4B are low, PLLB is identical to PLLA. When S3B is high,
N
B
can be set to 1, 10, 18, or 20. When S4B is high, the
frequency doubler option is enabled (P = 2). All Select pins
are TTL compatible.
s
External loop filter optimizes performance/cost
s
Available in 28-pin PLCC package
APPLICATIONS
s
s
s
s
Workstations
Advanced communications
High-end consumer
High-performance computing
PIN CONFIGURATION
S2B
25 24 23 22 21 20 19
V
CCOB
FOUTB
FOUTB
V
CC
FOUTA
FOUTA
V
CCOA
26
27
28
1
2
3
4
5
6
7
8
9
10 11
18
17
S4B
RINB
RINB
V
EE
RINA
RINA
V
BB
FINB
S1B
S3B
F1B
F2B
FINB
16
15
14
13
12
TOP VIEW
PLCC
J28-1
V
TH
FINA
FINA
S1A
S2A
F1A
F2A
Rev.: K
Amendment: /0
1
Issue Date: May 2000
Micrel
ClockWorks™
SY89420V
BLOCK DIAGRAM
F1A
F2A
RINA
D
RINA
PHASE-FREQUENCY
DETECTOR
FINA
D
FINA
LOOP
FILTER
VCO
S1A
S2A
÷ N
A
(2, 4, 8, 16)
FOUTA
FOUTA
V
BB
V
TH
FOUTB
FOUTB
RINB
D
RINB
PHASE-FREQUENCY
DETECTOR
FINB
FINB
S4B
F1B
F2B
÷
P
(1, 2)
S1B
S2B
S3B
÷ N
B
(1,2,4,8,10,12,16,20)
VCO
LOOP
FILTER
2
Micrel
ClockWorks™
SY89420V
LOOP FILTER COMPONENT SELECTION
PIN DESCRIPTION
RINA, RINA, RINB, RINB
Reference frequency inputs for loop A and B. These are
differential signal pairs and may be driven differentially or
single-ended.
FINA, FINA, FINB, FINB
Feedback frequency inputs for loop A and B. These are
differential signal pairs and may be driven differentially or
single-ended.
V
BB
, V
TH
These are the reference voltages for use as bias for the
frequency inputs. The references are generated on-chip. V
BB
is PECL compatible, while V
TH
is TTL compatible.
F1A, F2A, F1B, F2B
These pins are connection points for the loop filters, which are
to be provided off-chip. F1X is the high impedance side, F2X
is the reference side. The loop filter should be a first order, low
pass with a DC block. The difference voltage on these pins will
be a DC level, which is controlled by the loop feedback and
determined by the required VCO frequency.
FOUTA, FOUTA, FOUTB, FOUTB
Frequency outputs for the loops. These are differential,
positive referenced, emitter-follower signals and must be
terminated off-chip. Termination in 50 ohms is recommended.
S1A, S2A, S1B, S2B, S3B, S4B
These inputs are used to select the configuration for PLLA and
PLLB. They are compatible with standard TTL signal levels.
See the Frequency Selection Table for details of the logic.
V
CC
This is the positive supply for the entire chip excluding output
buffers. It should be decoupled and present a very low
impedance in order to assure low-jitter operation.
V
CCOA
, V
CCOB
These are the positive supplies for the output buffers. They
are constrained to be equal to the value of V
CC
. They should
be decoupled and present a very low impedance in order to
assure low-jitter operation.
V
EE
This pin is the negative supply for the chip and is normally
connected to ground (0V).
R
C
F1X
F2X
C
R
=
=
1.0µF
±10%
(X7R dielectric)
560Ω
±10%
PIN NAMES
Pin
F1A
F2A
RINA
RINA
FINA
FINA
FOUTA
FOUTA
F1B
F2B
RINB
RINB
FINB
FINB
FOUTB
FOUTB
V
CC
V
CCOA
V
CCOB
V
EE
V
BB
V
TH
S1A
S2A
S1B
S2B
S3B
S4B
Filter Pin 1A
Filter Pin 2A
Reference Input A
Inverted Reference Input A
Feedback Input A
Inverted Feedback Input A
Frequency Output A
Inverted Frequency Output A
Filter Pin 1B
Filter Pin 2B
Reference Input B
Inverted Reference Input B
Feedback Input B
Inverted Feedback Input B
Frequency Output B
Inverted Frequency Output B
V
CC
Output A V
CC
Output B V
CC
V
EE
(0V)
PECL Threshold Voltage
TTL Threshold Voltage
Select Input 1A (TTL)
Select Input 2A (TTL)
Select Input 1B (TTL)
Select Input 2B (TTL)
Select Input 3B (TTL)
Select Input 4B (TTL)
Function
I/O
I/O
I/O
I
I
I
I
O
O
I/O
I/O
I
I
I
I
O
O
O
O
I
I
I
I
I
I
3
Micrel
ClockWorks™
SY89420V
FREQUENCY SELECTION TABLE
PLLA
S2A
0
0
1
1
S1A
0
1
0
1
Divide-by-N
N=2
N=4
N=8
N = 16
Output Frequency Range (MHz)
240 – 560
120 – 280
60 – 140
30 – 70
PLLB
S3B
0
0
0
0
1
1
1
1
S2B
0
0
1
1
0
0
1
1
S1B
0
1
0
1
0
1
0
1
Divide-by-N
N =2
N=4
N=8
N = 16
N=1
N = 10
N = 12
N = 20
Output Frequency Range (MHz)
240 – 560
120 – 280
60 – 140
30– 70
480 – 1120
48 – 112
40 – 93.3
24 – 56
S4B
0
1
Divide-by-P
P =1
P=2
Max. Feedback Frequency (MHz)
560
1120
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CC
V
I
I
I
I
OUT
Parameter
Power Supply Voltage
TTL Input Voltage
(2)
TTL Input Current
(2)
ECL Output Current
— Continuous
— Surge
Storage Temperature
Operating Temperature Range
(3)
Value
–0.5 to +7.0
–0.5 to 6.0
–30 to +5.0
50
100
–65 to +150
0 to +85
°C
°C
Unit
V
V
mA
mA
T
store
T
A
NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATING conditions
for extended periods may affect device reliability.
2. Either voltage limit or current limit is sufficient to protect input.
3. All DC and AC electrical characteristics are specified over the operating temperature range.
4
Micrel
ClockWorks™
SY89420V
5V DC ELECTRICAL CHARACTERISTICS
V
CC
= V
CCOA
= V
CCOB
= 5.0V
±5%
Symbol
V
CC
I
CC
I
CCO
Parameter
Power Supply Voltage
Power Supply Current (V
CC
)
Power Supply Current (V
CCO
)
Min.
4.75
Typ.
Max.
5.25
200
28
Unit
V
mA
mA
PECL outputs are open
Condition
V
CC
= V
CCO
3.3V DC ELECTRICAL CHARACTERISTICS
V
CC
= V
CCOA
= V
CCOB
= 3.3V
±5%
Symbol
V
CC
I
CC
I
CCO
Parameter
Power Supply Voltage
Power Supply Current (V
CC
)
Power Supply Current (V
CCO
)
Min.
3.135
Typ.
Max.
3.465
200
28
Unit
V
mA
mA
PECL outputs are open
Condition
V
CC
= V
CCO
PECL DC ELECTRICAL CHARACTERISTICS
V
CC
= V
CCOA
= V
CCOB
= 3.3V or 5.0V
±5%
Symbol
V
OH
V
OL
V
IH
V
IL
V
BB
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
PECL Threshold
Min.
V
CC
– 1.025
V
CC
– 1.810
V
CC
– 1.165
V
CC
– 1.810
Typ.
V
CC
– 1.35
Max.
V
CC
– 0.780
V
CC
– 1.520
V
CC
– 0.780
V
CC
– 1.475
Unit
V
V
V
V
V
Condition
TTL DC ELECTRICAL CHARACTERISTICS
V
CC
= V
CCOA
= V
CCOB
= 3.3V or 5.0V
±5%
Symbol
V
IH
V
IL
I
IH
I
IL
V
IK
V
TH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Input Clamp Voltage
TTL Threshold
Min.
2.0
Typ.
1.5
Max.
0.8
20
100
–0.3
– 1.2
Unit
V
V
µA
mA
V
V
V
IN
= 2.7V
V
IN
= V
CC
V
IN
= 0.5V
I
IN
= –12mA
Condition
5
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参数对比
与SY89420VJCTR相近的元器件有:SY89420VJC、SY89420V_11、SY89420V。描述及对比如下:
型号 SY89420VJCTR SY89420VJC SY89420V_11 SY89420V
描述 5V/3.3V DUAL PHASE LOCKED LOOP 5V/3.3V DUAL PHASE LOCKED LOOP 5V/3.3V DUAL PHASE LOCKED LOOP 5V/3.3V DUAL PHASE LOCKED LOOP
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