TEF668X
Low IF tuner high performance one-chip
Rev. 1 — 30 July 2013
Product short data sheet
1. General description
The Low IF Tuner HIgh performance One chips, TEF6686 and TEF6688, are single-chip
radio ICs including an AM/FM radio tuner and software-defined radio signal processing.
They extend NXP Semiconductors’ broad, industry-proven car radio single tuner portfolio,
offering outstanding radio performance with the widest range of features and state of the
art software algorithms at most optimized system costs.
Both devices are available in HVQFN packages occupying the smallest PCB space and
are suitable for dual- and multi-layer PCBs. The radio receiver includes highest feature
sets, the FM/AM front-ends, tuning synthesizer, channel filtering, FM Channel
Equalization, FM multipath improvement, demodulation, FM stereo decoding, weak signal
processing, noise blanking and RDS and provides an interface to a DARC
demodulator/decoder.
The TEF6686 and TEF6688 can provide stereo audio in digital format on the I²S outputs
and on the audio DAC outputs. The TEF6688 supports the digital radio standards HD
Radio and Digital Radio Mondiale (DRM) digital radio when used with NXP
Semiconductors’ digital radio coprocessors such as SAF356X and SAF360X.
2. Features and benefits
Alignment free digital receiver including tuner and software-defined radio processing
Command based high-level user interface combining high control flexibility with ease
of control
Read information with device and tuning status, reception quality and RDS data
FM receiver with a tuning range of 65 MHz to 108 MHz covering Eastern Europe
(OIRT), Japan, Europe and US bands
AM receiver covering LW, MW and full SW
Fully integrated tuning system with low phase noise and fast tuning
FM LNA with AGC
State-of-the art FM Improved Multipath Suppression
FM Channel Equalization
Soft Mute on Modulation
Stereo High Blend
FM mixer for frequency conversion to a low IF complex signal (AM SW)
AM LNA with AGC, matching active and passive antenna applications
AM mixer for frequency conversion to a low IF complex signal
NXP Semiconductors
TEF668X
Low IF tuner high performance one-chip
High dynamic range Sigma Delta IF ADC
Digital IF signal processing including decimation, shift to baseband, AGC control, I/Q
correction, variable IF bandwidth filtering (PACS) and demodulation
FM stereo decoding
TEF6688 baseband I
2
S output supporting HD Radio and DRM
1
with external digital
radio coprocessor (SAF356X or SAF360X)
Blending function for HD Radio reception (TEF6688)
AM and FM noise blanking, Signal quality detection and weak signal processing
Advanced RDS and RBDS demodulation and decoding
MPX output supporting DARC demodulator
One I
2
S input and one I
2
S output
Two mono audio DACs
Single 3.3 V supply voltage
Fast mode I
2
C-bus (400 kHz)
Configurable GPIO pins for RDS, Quality Status Interrupt and generic I
2
C-bus
controlled I/O
Qualified in accordance with AEC-Q100
3. Applications
The TEF668X is a single tuner AM/FM receiver for automotive applications and supports
analog AM/FM and HD/DRM reception (HD/DRM is supported in TEF6688 only).
Additionally, due to a common technology platform, the TEF668X can be combined with
TEF701X, SAF775X and SAF360X for optimal system application through common
crystal oscillator sharing.
4. Quick reference data
Table 1.
Symbol
V
DDA(RF)(3V3)
V
DDA(IF)(3V3)
V
DDD(3V3)
Quick reference data
Parameter
Conditions
Min
3.0
3.0
3.0
Typ
3.3
3.3
3.3
Max
3.5
3.5
3.5
Unit
V
V
V
Supply voltage
RF analog supply voltage (3.3 V) on pin VDDA_RF
IF analog supply voltage (3.3 V)
digital supply voltage (3.3 V)
on pin
VDDA_IFADC
on pin
VDD_DIGITAL
on pin VDDA_RF
on pin
VDDA_IFADC
on pin VDDD
on pin VDDA_RF
Current in FM mode
I
DDA(RF)
I
DDA(IFADC)
I
DDD
I
DDA(RF)
RF analog supply current
IF ADC analog supply current
digital supply current
RF analog supply current
33
81
37
34
37
94
38
40
42
110
48
48
mA
mA
mA
mA
Current in AM - MW/LW mode
1.
DRM includes DRM30 and DRM+ (band
and
)
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
TEF668X_SDS
Product short data sheet
Rev. 1 — 30 July 2013
2 of 8
NXP Semiconductors
TEF668X
Low IF tuner high performance one-chip
Table 1.
Symbol
I
DDA(IFADC)
I
DDD
I
DDA(RF)
I
DDA(IFADC)
I
DDD
Quick reference data
…continued
Parameter
IF ADC analog supply current
digital supply current
RF analog supply current
IF ADC analog supply current
digital supply current
Conditions
on pin
VDDA_IFADC
on pin VDDD
on pin VDDA_RF
on pin
VDDA_IFADC
on pin VDDD
Min
63
33
0
25
15
Typ
74
34
0.3
37
24
Max
86
46
2
45
35
Unit
mA
mA
mA
mA
mA
Current in Standby mode
5. Ordering information
Table 2.
Ordering information
Package
Name
TEF6686HN/V101
TEF6688HN/V101
[1]
Type number
Description
plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5
5
0.85 mm
[1]
Version
SOT617-3
HVQFN32
Wettable sides to allow for optical inspection.
TEF668X_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 1 — 30 July 2013
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6. Block diagram
Product short data sheet
Rev. 1 — 30 July 2013
4 of 8
TEF668X_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
NXP Semiconductors
DIGITAL
TUNING
DIVIDERS SYSTEM
DCO
XTAL
OSC
TEF668X
FM
BPF
FM FRONT-END
AUDIO
PROCESSING
STEREO
DAC
ADC
RADIO PROCESSING
DAC_R
DAC_L
DR_BL
(1)
AM
BPF
AM FRONT-END
IC CONTROL
UNIT
POWER
DIGITAL RADIO
INTERFACE
I
2
S INPUT
BUFFER
I
2
S OUTPUT
BUFFER
I
2
C
SDA
SCL
Low IF tuner high performance one-chip
3.3 V
DR_BCK
(1)
DR_I_DATA
(1)
GPIO_1
(2)
DR_Q_DATA
(1)
GPIO_0
I2S_SD_0
I2S_BCK
I2S_WS
I2S_SD_1
DR_WS
(1)
GPIO_2
(2)
aaa-003749
(1) TEF6688
(2) GPIO_1 and GPIO_2 are output only.
TEF668X
Fig 1.
Block diagram
NXP Semiconductors
TEF668X
Low IF tuner high performance one-chip
7. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DDA(IF)(3V3)
V
DDD(3V3)
Parameter
IF analog supply voltage (3.3 V)
digital supply voltage (3.3 V)
Conditions
on pin VDDA_IFADC
on pin VDDD
between pins VDDA_IFADC and
VDDA_RF
all supply voltages below the
maximum value
[1]
Min
0.5
0.5
0.5
0.3
0.5
100
-
55
40
40
Max
+3.9
+3.9
+3.9
+0.3
Unit
V
V
V
V
V
DDA(RF)(3V3)
RF analog supply voltage (3.3 V) on pin VDDA_RF
V
DD(3V3-3V3)
supply voltage difference
between two 3.3 V supplies
V
n
I
lu
V
lu
T
stg
T
amb
T
j
[1]
voltage on any other pin
latch-up current
latch-up voltage
storage temperature
ambient temperature
junction temperature
In accordance with AEC-Q100-004.
+V
DDD(3V3)
+ 0.3 V
+100
1.5
V
DDD(3V3)
+150
+85
+125
mA
V
C
C
C
8. Revision history
Table 4.
Revision history
Release date
20130730
Data sheet status
Product short data sheet
Change notice
-
Supersedes
-
Document ID
TEF668X_SDS v.1
TEF668X_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 1 — 30 July 2013
5 of 8
