TISP6NTP2A
QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS
TISP6NTP2A Programmable Protector
Independent Overvoltage Protection for Two SLICs in Short
Loop Applications:
– Wide 0 to -90 V Programming Range
– Low 5 mA max. Gate Triggering Current
– High 150 mA min. (85
°C)
Holding Current
– Specified 1.2/50 & 0.5/700 Limiting Voltage
– Full -40
°C
to 85
°C
Temperature Range
Rated for Common Impulse Waveforms
D Package (Top View)
K1
G1,G2
G3,G4
K3
1
2
3
4
8
7
6
5
K2
A
A
K4
MDRXAM
Voltage Impulse
Form
10/1000
µs
10/700
µs
1.2/50
µs
2/10
µs
Current Impulse
Shape
10/1000
µs
5/310
µs
8/20
µs
2/10
µs
I
TSP
A
20
25
75
85
Device Symbol
K1
G1,G2
Description
The TISP6NTP2A has been designed for short loop systems
such as:
– WILL (Wireless In the Local Loop)
– FITL (Fibre In The Loop)
– DAML (Digital Added Main Line, Pair Gain)
– SOHO (Small Office Home Office)
– ISDN-TA (Integrated Services Digital Network -
Terminal Adaptors)
K2
A
A
K3
Typical TISP6NTP2A Router Application
TERMINAL ADAPTOR
SLIC 1
PROCESSOR
SLIC 2
TISP6
NTP2A
POTS 2
POTS 1
K4
SDRXAI
G3,G4
LINE
TRANSCEIVER
TRANSCEIVER
LAN
How To Order
Carrier
Order #
Tape and Reel TISP6NTP2ADR
TISP6NTP2A D, Small-Outline
Tube
TISP6NTP2AD
Device
Package
JUNE 1998 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
220
TISP6NTP2A Programmable Protector
Description (continued)
These systems often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a facsimile
machine. In a single surface mount package, the TISP6NTP2A protects the two POTS line SLICs (Subscriber Line Interface Circuits) against
overvoltages caused by lightning, a.c. power contact and induction.
The TISP6NTP2A has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each
thyristor. The buffer transistors reduce the gate supply current.
In use, the cathodes of an TISP6NTP2A thyristor are connected to the four conductors of two POTS lines (see applications information). Each
gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC can
be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2A is connected to the
SLIC common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2A antiparallel diode. Negative overvoltages are initially
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2A buffer transistor. If sufficient clipping current flows, the
TISP6NTP2A thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of
the TISP6NTP2A prevents d.c. latchup.
Absolute Maximum Ratings, TA = 25
°C
(Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, I
G
= 0, -40
°C
≤
T
J
≤
85
°C
Repetitive peak gate-cathode voltage, V
KA
= 0, -40
°C
≤
T
J
≤
85
°C
Non-repetitive peak on-state pulse current, -40
°C
≤
T
J
≤
85
°C,
(see Notes 1 and 2)
10/1000
µs
(Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
0.2/310
µs
(I3124, open-circuit voltage wave shape 0.5/700
µs)
5/310
µs
(ITU-T K.20 & K.21, open-circuit voltage wave shape 10/700
µs)
8/20
µs
(IEC 61000-4-5:1995, open-circuit voltage wave shape 1.2/50
µs)
2/10
µs
(Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
Non-repetitive peak on-state current, 50/60 Hz, -40
°C
≤
T
J
≤
85
°C,
(see Notes 1 and 2)
100 ms
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2
µs
pulse, cathodes commoned (see Note 1)
Operating free-air temperature range
Junction temperature
Storage temperature range
I
TSM
7
2.7
1.5
0.45
0.43
25
-40 to +85
-40 to +150
-65 to +150
A
I
TSP
20
25
25
75
85
A
Symbol
V
DRM
V
GKRM
Value
-100
-90
Unit
V
V
I
GSM
T
A
T
J
T
stg
A
°C
°C
°C
NOTES: 1. Initially, the protector must be in thermal equilibrium with -40
°C
≤
T
J
≤
85
°C.
The surge may be repeated after the device returns
to its initial conditions.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathode-
anode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in
this case the anode terminal current will be four times the rated current value of an individual terminal pair). Above 85
°C,
derate
linearly to zero at 150
°C
lead temperature.
JUNE 1998 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
221
TISP6NTP2A Programmable Protector
Recommended Operating Conditions
Min.
C
G
Gate decoupling capacitor
Series resistor for GR-1089-CORE first-level surge survival
Series resistor for ITU-T recommendation K.20
Series resistor for ITU-T recommendation K.21
Series resistor for IEC 61000-4-5:1995, class 5, 1.2/50 or 10/700
100
40
12
20
4
Typ.
220
Max.
Unit
nF
R1, R2
Ω
Electrical Characteristics for any Section, TA = 25
°C
(Unless Otherwise Noted)
Parameter
I
D
Off-state current
V
D
= V
DRM
, I
G
= 0
Test Conditions
T
J
= 25
°C
T
J
= 85
°C
Min.
Typ.
Max.
-5
-50
-70
V
-70
2
3
5
15
V
15
2
4
-150
T
J
= 25
°C
T
J
= 85
°C
-5
-50
-1
µs
mA
µA
µA
mA
µs
V
Unit
µA
µA
V
(BO)
t
(BR)
V
F
Breakover voltage
Breakdown time
Forward voltage
Peak forward recovery
voltage
Forward recovery time
Holding current
Gate reverse current
Gate reverse current,
on state
Gate reverse current,
forward conducting
state
Gate trigger current
Gate trigger voltage
Anode-cathode off-
state capacitance
I
T
= -20 A, IEC 61000-4-5:1995 combination impulse generator,
V
GG
= -50 V
I
T
= -18 A, I3124 impulse generator, V
GG
= -50 V
I
T
= -18 A, I3124 impulse generator, V
(BR)
< -50 V
I
F
= 0.6 A, t
w
= 500
µs,
V
GG
= -50 V
I
F
= 18 A, t
w
= 500
µs,
V
GG
= -50 V
I
F
= 20 A, IEC 61000-4-5:1995 combination impulse generator,
V
GG
= -50 V
I
F
= 18 A, I3124 impulse generator, V
GG
= -50 V
I
F
= 18 A, I3124 impulse generator,
V
GG
= -50 V
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -50 V, T
J
= 85
°C
V
GG
= V
GKRM
, V
AK
= 0
I
T
= -0.6 A, t
w
= 500
µs,
V
GG
= -50 V
I
F
= 0.6 A, t
w
= 500
µs,
V
GG
= -50 V
I
T
= -5 A, t
p(g)
≥
20
µs,
V
GG
= -50 V
I
T
= -5 A, t
p(g)
≥
20
µs,
V
GG
= -50 V
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 3)
V
D
= -3 V
V
D
= -50 V
V
F
> 10 V
V
F
> 5 V
V
FRM
t
FR
I
H
I
GKS
I
GAT
I
GAF
I
GT
V
GT
C
AK
-40
5
2.5
100
60
mA
mA
V
pF
pF
NOTE
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter
R
θ
JA
Junction to free air thermal resistance
Test Conditions
P
tot
= 0.52 W, T
A
= 85
°C,
5 cm
2
, FR4 PCB
Min.
Typ.
Max.
160
Unit
°C/W
JUNE 1998 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
222
TISP6NTP2A Programmable Protector
Parameter Measurement Information
PR IN C IPA L TER MIN A L V-I C H AR A C TER ISTIC
+i
I
FSP
(= |I
TSP
|)
Q uadran t I
Forw ard
C onduction
C haracteristic
G AT E TR AN SFER
C H AR A C TER ISTIC
+i
K
I
FSM
(= |I
TSM
|)
I
F
V
F
V
G K (B O )
V
GG
V
D
I
D
I
G T
+v
-i
G
I
G A F
+i
G
I
F
-v
I
(B O )
I
S
I
H
V
T
I
T
I
TSM
I
G
I
G A T
I
T
V
(BO)
V
S
Q uadran t III
Sw itchin g
C haracteristic
I
TSP
-i
P M6X AIA
I
K
-i
K
Figure 1. Principal Terminal And Gate Transfer Characteristics
JUNE 1998 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
223
TISP6NTP2A Programmable Protector
APPLICATIONS INFORMATION
Operation of Gated Protectors
Figure 2 and Figure 3 show how the TISP6NTP2A limits overvoltages. The TISP6NTP2A thyristor sections limit negative overvoltages and the
diode sections limit positive overvoltages.
SLIC
PROTECTOR
R1A
R1A
SLIC
PROTECTOR
SLIC 1
SLIC 1
R1B
V
BAT1
R1B
V
BAT1
C1
100 nF
TISP6NTP2A
R2A
0V
C1
100 nF
TISP6NTP2A
R2A
0V
SLIC 2
SLIC 2
I
K
R2B
V
BAT2
I
G
R2B
I
F
V
BAT2
I
G
AI6XBN
C2
100 nF
0V
AI6XBO
C2
100 nF
0V
Figure 2. Negative Overvoltage Condition
Figure 3. Positive Overvoltage Condition
Negative overvoltages (Figure 2) are initially clipped close to the SLIC negative supply rail value (VBAT) by the conduction of the transistor
base-emitter and the thyristor gate-cathode junctions. If sufficient current is available from the overvoltage, then the thyristor will crowbar into
a low voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the crowbar thyristor prevents
d.c. latchup. The common gate of each thyristor pair is connected the appropriate SLIC battery feed voltage (VBAT1 or VBAT2).
The negative protection voltage, V(BO), will be the sum of the gate supply (VBAT) and the peak gate (terminal)-cathode voltage (VGT). Under
a.c. overvoltage conditions VGT will be less than 2.5 V. The integrated transistor buffer in the TISP6NTP2A greatly reduces protectors source
and sink current loading on the VBAT supply. Without the transistor, the thyristor gate current would charge the VBAT supply. An electronic
power supply is not usually designed to be charged like a battery. As a result, the electronic supply would switch off and the thyristor gate
current would provide the SLIC supply current. Normally the SLIC current would be less than the gate current, which would cause the supply
voltage to increase and destroy the SLIC by a supply overvoltage. The integrated transistor buffer removes this problem.
Fast rising impulses will cause short term overshoots in gate-cathode voltage. The negative protection voltage under impulse conditions will
also be increased if there is a long connection between the gate decoupling capacitor and the gate terminal. During the initial rise of a fast
impulse, the gate current (IG ) is the same as the cathode current (IK ). Rates of 60 A/µs can cause inductive voltages of 0.6 V in 2.5 cm of
printed wiring track. To minimize this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking
should be minimized.
.
JUNE 1998 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
224
