TQP3M9007
¼W High Linearity LNA Gain Block
Applications
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•
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•
Repeaters
Mobile Infrastructure
LTE / WCDMA / CDMA / EDGE
General Purpose Wireless
SOT-89 Package
Product Features
•
•
•
•
•
•
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100-4000 MHz
13 dB Gain @ 1.9 GHz
1.3 dB Noise Figure @ 1.9 GHz
+41 dBm Output IP3
+23.6 dBm P1dB
50 Ohm Cascadable Gain Block
Unconditionally Stable
High Input Power Capability
+5V Single Supply, 125 mA Current
SOT-89 Package
Functional Block Diagram
GND
4
1
RF IN
2
GND
3
RF OUT
General Description
The TQP3M9007 is a high linearity low noise gain block
amplifier in a low-cost surface-mount package. At 1.9
GHz, the amplifier typically provides 13 dB gain, +41
dBm OIP3, and 1.3 dB Noise Figure while drawing 125
mA current. The device is housed in a
leadfree/green/RoHS-compliant industry-standard SOT-
89 package.
The TQP3M9007 has the benefit of having high linearity
while also providing very low noise across a broad range
of frequencies. This allows the device to be used in both
receive and transmit chains for high performance
systems. The amplifier is internally matched using a high
performance E-pHEMT process and only requires an
external RF choke and blocking/bypass capacitors for
operation from a single +5V supply. The internal active
bias circuit also enables stable operation over bias and
temperature variations.
The TQP3M9007 covers the 0.1 - 4 GHz frequency band
and is targeted for wireless infrastructure or other
applications requiring high linearity and/or low noise
figure.
Pin Configuration
Pin #
1
3
2, 4
Symbol
RF IN
RF OUT
GND
Ordering Information
Part No.
TQP3M9007
TQP3M9007-PCB
Description
High Linearity LNA Gain Block
0.5-4 GHz Evaluation Board
Standard T/R size =1000 pieces on a 7” reel.
Data Sheet: Rev D 12/27/11
© 2011 TriQuint Semiconductor, Inc.
-
1 of 9
-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9007
¼W High Linearity LNA Gain Block
Specifications
Absolute Maximum Ratings
Parameter
Storage Temperature
RF Input Power,CW,50
Ω,T=25ºC
Device Voltage,V
dd
Recommended Operating Conditions
Parameter
o
Rating
-55 to 150 C
+20 dBm
+7 V
Min
3
-40
Typ
5
Max Units
5.25
+85
190
V
o
C
o
C
V
dd
Tcase
Tj (for>10
6
hours MTTF
)
Operation of this device outside the parameter ranges given
above may cause permanent damage.
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
Electrical Specifications
Test conditions unless otherwise noted: +25ºC, +5V supply, 50
Ω
system.
Parameter
Operational Frequency Range
Test Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3
Noise Figure
Supply Voltage, V
dd
Current, I
dd
Thermal Resistance (jnc to case)
θ
jc
Conditions
Min
100
Typical
1900
Max
4000
Units
MHz
MHz
dB
dB
dB
dBm
dBm
dB
V
11.5
13
18
13
+23.6
14.5
See Note 1.
+37
+41
1.3
+5
125
52
150
mA
o
C/W
Notes:
1. OIP3 is measured with two tones at an output power of 4 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product
is used to calculate the OIP3 using 2:1 rule. 2:1 rule gives relative value with respect to fundamental tone.
Data Sheet: Rev D 12/27/11
© 2011 TriQuint Semiconductor, Inc.
-
2 of 9
-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9007
¼W High Linearity LNA Gain Block
Device Characterization Data
S11
6
0.
S22
Swp Max
6GHz
6
0.
1.0
Swp Max
6GHz
2.
0
0.8
30
25
3.
0
10.0
10.0
Gain (dB)
20
15
10.0
0.2
0.4
0.6
0.8
1.0
2.0
3.0
4.0
5.0
0.2
0.4
0.6
0.8
1.0
2.0
3.0
4.0
5.0
0
0
10
5
0.0
-0
.4
.4
-0
.0
-2
-0
.6
-0.8
-1.0
-0.8
Frequency (GHz)
S-Parameter Data
V
dd
= +5 V, I
cq
= 125 mA, T = +25
°
C, unmatched 50 ohm system, calibrated to device leads
Freq
(MHz)
50
100
200
400
800
1000
1200
1500
1900
2000
2200
2500
2600
3000
3500
4000
S11 (dB)
-9.21
-9.18
-9.58
-11.09
-13.55
-14.69
-15.31
-16.32
-16.36
-16.44
-16.55
-16.78
-16.83
-17.62
-18.79
-20.11
S11 (ang)
-171.69
178.66
168.58
155.91
148.37
147.37
148.14
152.38
155.45
154.43
154.33
153.75
154.69
157.51
154.34
176.37
S21 (dB)
21.92
21.72
21.39
20.71
18.58
17.47
16.33
14.85
13.11
12.73
11.98
10.97
10.59
9.53
8.24
7.01
S21 (ang)
165.87
164.31
154.89
134.86
99.19
84.06
70.48
52.18
30.26
25.52
15.20
0.51
-4.70
-24.26
-48.07
-72.56
S12 (dB)
-28.66
-28.54
-28.25
-27.05
-24.58
-23.58
-22.59
-21.45
-19.96
-19.77
-19.13
-18.24
-18.14
-17.17
-16.19
-15.53
S12 (ang)
7.52
8.08
11.48
16.59
17.74
14.87
12.31
6.08
-2.85
-5.72
-12.30
-20.16
-23.60
-36.43
-53.90
-72.99
S22 (dB)
-10.26
-10.62
-10.93
-11.61
-12.39
-13.43
-13.72
-14.84
-15.21
-15.43
-16.18
-16.76
-16.24
-16.21
-14.74
-11.54
-1.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Swp Min
0.01GHz
-0
.6
-2
.0
S22 (ang)
-177.68
166.81
145.14
112.74
63.78
40.99
23.70
-3.77
-32.08
-42.20
-54.41
-84.02
-91.43
-128.42
-165.72
154.74
Data Sheet: Rev D 12/27/11
© 2011 TriQuint Semiconductor, Inc.
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Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
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-3
.
0
-3
.0
Gain (dB)
Swp Min
0.01GHz
-4
.0
-5.
0
-4
.0
-5.
0
2
-0.
2
-0.
-10.0
0.2
-10.0
0.2
De-embedded S-parameter
Vcc = 5V
0
4.
5.0
0.
4
0.
4
Gain and Max Stable Gain
2.
0
0.8
1.0
3.
0
0
4.
5.0
10.0
TQP3M9007
¼W High Linearity LNA Gain Block
Application Circuit Configuration
GND
J3
C3
C1
Q1
C2
C6
Notes:
1. See PC Board Layout, under Application Information section, for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. B1 (0
Ω
jumper) may be replaced with copper trace in the target application layout.
4. All components are of 0603 size unless stated on the schematic.
5. C6 and L2 value are critical for linearity performance.
Bill of Material: TQP3M9007-PCB
Reference Desg.
Q1
C2
C6
C1
L2
C3
B1
D1
100 pF
27 pF
0.1 uF
56 nH
4.7 uF
0
Ω
Do Not Place
Value
Description
High Linearity LNA Gain Block
Cap, Chip, 0603, 50V, NPO, 5%
Cap, Chip, 0603, 50V, NPO, 5%
Cap, Chip, 0603, 16V, X7R, 10%
Ind, Chip, 0603, 5%
Res, Chip, 0603, 1/16W, 5%
Manufacturer
TriQuint
various
various
various
various
various
various
Part Number
TQP3M9007
Cap, Chip, 0603, 6.3V, X5R, 20% various
Data Sheet: Rev D 12/27/11
© 2011 TriQuint Semiconductor, Inc.
-
4 of 9
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Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9007
¼W High Linearity LNA Gain Block
Typical Performance TQP3M9007-PCB
Test conditions unless otherwise noted: +25ºC, +5V, 125 mA, 50
Ω
system. The data shown below is measured on TQP3M9007-PCB
Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
OIP3 [1]
Noise Figure [2]
MHz
dB
dB
dB
dBm
dBm
dB
500
20
11.5
10.5
+22.9
+39.3
1.4
900
18
14
13
+23.3
+40.2
1.2
1900
13
18
13
+23.5
+41.1
1.3
2100
12
17.5
12
+23.8
+42.2
1.4
2600
10
15.5
10.5
+24.0
+42.2
1.8
Notes:
1.
OIP3 measured with two tones at an output power of +4 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is
used to calculate the OIP3 using 2:1 rule.
2.
Noise figure data shown in the table above is measured on evaluation board and corrected for the board loss of about 0.13 dB @ 1.9 GHz.
Performance Plots
Performance plots data is measured using TQP3M9007-PCB. Noise figure plot has been corrected for evaluation board loss of
0.13 dB @ 1.9 GHz.
24
22
20
18
Gain (dB)
Gain vs. Frequency
Vcc = 5V
0
-5
-10
-15
-20
-25
Input Return Loss vs. Frequency
Vcc = 5V
0
-5
-10
-15
-20
-25
Output Return Loss vs. Frequency
Vcc = 5V
16
14
12
10
8
6
0.0
0.5
1.0
1.5
2.0
2.5
+85
°
C
+25
°
C
−40
°
C
+85
°
C
+25
°
C
−40
°
C
3.0
3.5
4.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Output Return Loss (dB)
Input Return Loss (dB)
+85
°
C
+25
°
C
−40
°
C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Frequency (GHz)
4.0
3.5
3.0
NF (dB)
Vcc = 5 V
Frequency (GHz)
50
Frequency (GHz)
50
+85
°
C
+25
°
C
−30
C
−40
°
C
Noise Figure vs. Frequency
OIP3 vs. Output Power/Tone
+85
°
C
+25
°
C
−30
C
−40
°
C
Freq. = 900 MHz
1MHz Tone Spacing
Vcc = 5V
OIP3 vs. Output Power/Tone
Freq. = 1900 MHz
1 MHz Tone Spacing
Vcc = 5V
OIP3 (dBm)
2.0
1.5
1.0
0.5
0.0
0.5
1.0
40
OIP3 (dBm)
2.5
+85
°
C
+25
°
C
−40
°
C
45
45
40
35
35
30
1.5
2.0
2.5
3.0
0
2
4
6
8
10
12
30
0
2
4
6
8
10
12
Frequency (GHz)
Output Power (dBm)
Output Power/Tone (dBm)
Data Sheet: Rev D 12/27/11
© 2011 TriQuint Semiconductor, Inc.
-
5 of 9
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Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
