TS4990
1.2 W audio power amplifier with active-low standby mode
Features
■
■
■
■
■
■
■
■
TS4990IJT/TS4990EIJT - Flip-chip 9 bumps
Operating range from V
CC
= 2.2 V to 5.5 V
1.2 W output power at V
CC
= 5 V, THD = 1%,
F = 1 kHz, with 8
Ω
load
Ultra-low consumption in standby mode (10 nA)
62 dB PSRR at 217 Hz in grounded mode
Near-zero pop and click
Ultra-low distortion (0.1%)
Unity gain stable
Available in 9-bump flip-chip, miniSO-8 and
DFN8 packages
TS4990IST - MiniSO-8
Vin-
GND
BYPASS
Vin+
VCC
STBY
VOUT1
GND
VOUT2
Applications
■
■
■
■
Mobile phones (cellular / cordless)
Laptop / notebook computers
PDAs
Portable audio devices
TS4990IQT - DFN8
Description
The TS4990 is designed for demanding audio
applications such as mobile phones to reduce the
number of external components.
This audio power amplifier is capable of delivering
1.2 W of continuous RMS output power into an
8
Ω
load at 5 V.
An externally controlled standby mode reduces
the supply current to less than 10 nA. It also
includes an internal thermal shutdown protection.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
STANDBY
BYPASS
VIN+
VIN–
1
8
VOUT2
GND
VCC
VOUT1
2
7
3
6
4
5
TS4990ID/TS4990IDT - SO-8
STBY
BYPASS
1
8
VOUT2
GND
V
CC
VOUT1
2
7
VIN+
VIN-
3
6
4
5
August 2011
Doc ID 9309 Rev 13
1/33
www.st.com
33
Contents
TS4990
Contents
1
2
3
4
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
BTL configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Gain in a typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Low and high frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power dissipation and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Wake-up time (t
WU
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Standby time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Pop performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Application example: differential input, BTL power amplifier . . . . . . . . . . 23
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1
5.2
5.3
5.4
Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/33
Doc ID 9309 Rev 13
TS4990
Absolute maximum ratings and operating conditions
1
Table 1.
Symbol
V
CC
V
in
T
oper
T
stg
T
j
Absolute maximum ratings and operating conditions
Absolute maximum ratings (AMR)
Parameter
Supply voltage
(1)
Input voltage
(2)
Operating free-air temperature range
Storage temperature
Maximum junction temperature
Thermal resistance junction to ambient
Flip-chip
(3)
MiniSO-8
DFN8
Power dissipation
HBM: Human body model
(4)
MM: Machine model
(5)
Latch-up immunity
Lead temperature (soldering, 10sec)
Lead temperature (soldering, 10sec) for lead-free version
Value
6
GND to V
CC
-40 to + 85
-65 to +150
150
250
215
120
Internally limited
2
200
200
250
260
kV
V
mA
°C
Unit
V
V
°C
°C
°C
R
thja
°C/W
P
diss
ESD
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed V
CC
+ 0.3 V / GND - 0.3 V.
3. The device is protected in case of over temperature by a thermal shutdown active at 150° C.
4. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
5. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5
Ω).
This is done for all couples of connected pin combinations
while the other pins are floating.
Table 2.
Symbol
V
CC
V
icm
V
STBY
R
L
T
SD
Operating conditions
Parameter
Supply voltage
Common mode input voltage range
Standby voltage input:
Device ON
Device OFF
Load resistor
Thermal shutdown temperature
Thermal resistance junction to ambient
Flip-chip
(1)
MiniSO-8
DFN8
(2)
Value
2.2 to 5.5
1.2V to V
CC
1.35
≤
V
STBY
≤
V
CC
GND
≤
V
STBY
≤
0.4
≥
4
150
100
190
40
Unit
V
V
V
Ω
°C
R
thja
°C/W
1. This thermal resistance is reached with a 100 mm
2
copper heatsink surface.
2.
When mounted on a 4-layer PCB.
Doc ID 9309 Rev 13
3/33
Typical application schematics
TS4990
2
Typical application schematics
Figure 1.
Typical application schematics
Rfeed
Cfeed
Vcc
+
Cs
VCC
Audio In
Cin
Rin
Vin-
-
Vout 1
Vin+
+
Speaker
8 Ohms
-
AV = -1
Bypass
Vout 2
+
Standby
Control
Cb
Standby
Bias
GND
Table 3.
Component descriptions
Functional description
Inverting input resistor that sets the closed loop gain in conjunction with R
feed
. This
resistor also forms a high pass filter with C
in
(F
c
= 1 / (2 x Pi x R
in
x C
in
)).
Input coupling capacitor that blocks the DC voltage at the amplifier input terminal.
Feed back resistor that sets the closed loop gain in conjunction with R
in
.
Supply bypass capacitor that provides power supply filtering.
Bypass pin capacitor that provides half supply filtering.
Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off
frequency 1/ (2 x Pi x R
feed
x C
feed
)).
Closed loop gain in BTL configuration = 2 x (R
feed
/ R
in
).
DFN8 exposed pad is electrically connected to pin 7. See
DFN8 package
information on page 29
for more information.
Component
R
in
C
in
R
feed
C
s
C
b
C
feed
A
V
Exposed pad
4/33
+
TS4990
Doc ID 9309 Rev 13
TS4990
Electrical characteristics
3
Electrical characteristics
Table 4.
Symbol
I
CC
I
STBY
V
oo
P
out
THD + N
Electrical characteristics when V
CC
= +5 V, GND = 0 V, T
amb
= 25°C
(unless otherwise specified)
Parameter
Supply current
No input signal, no load
Standby current
(1)
No input signal, V
STBY
= GND, R
L
= 8Ω
Output offset voltage
No input signal, R
L
= 8
Ω
Output power
THD = 1% max, F = 1kHz, R
L
= 8
Ω
Total harmonic distortion + noise
P
out
= 1W
rms
, A
V
= 2, 20Hz
≤
F
≤
20kHz, R
L
= 8
Ω
Power supply rejection ratio
(2)
R
L
= 8
Ω,
A
V
= 2, V
ripple
= 200mV
pp
, input grounded
F = 217Hz
F = 1kHz
Wake-up time (C
b
= 1 µF)
Standby time (C
b
= 1 µF)
Standby voltage level high
Standby voltage level low
Phase margin at unity gain
R
L
= 8
Ω,
C
L
= 500 pF
Gain margin
R
L
= 8
Ω,
C
L
= 500 pF
Gain bandwidth product
R
L
= 8
Ω
Resistor output to GND (V
STBY
≤
V
STBYL
)
V
out1
V
out2
65
15
1.5
0.9
Min.
Typ.
3.7
10
1
1.2
0.2
Max.
6
1000
10
Unit
mA
nA
mV
W
%
PSRR
55
55
62
64
90
10
1.3
0.4
130
dB
t
WU
t
STBY
V
STBYH
V
STBYL
Φ
M
GM
GBP
ms
µs
V
V
Degrees
dB
MHz
R
OUT-GND
3
43
kΩ
1. Standby mode is active when V
STBY
is tied to GND.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the sinusoidal signal superimposed upon
V
CC
.
Doc ID 9309 Rev 13
5/33
