TSM2N70
700V N-Channel Power MOSFET
TO-220
TO-251
(IPAK)
TO-252
(DPAK)
Pin Definition:
1. Gate
2. Drain
3. Source
PRODUCT SUMMARY
V
DS
(V)
700
R
DS(on)
( )
6.5 @ V
GS
=10V
I
D
(A)
1
General Description
The TSM2N70 N-Channel enhancement mode Power MOSFET is produced by planar stripe DMOS technology.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior
switching performance, and withstand high energy pulse in the avalanche and commutation mode. These
devices are well suited for high efficiency switch mode power supply, power factor correction, electronic lamp
ballast based on half bridge.
Features
●
●
●
●
Low R
DS(ON)
6.5 (Max.)
Low gate charge typical @ 9.5nC (Typ.)
Low Crss typical @ 4.5pF (Typ.)
Fast Switching
Ordering Information
Part No.
TSM2N70CZ C0
TSM2N70CH C5
TSM2N70CH C5G
TSM2N70CP RO
TSM2N70CP ROG
Note: “G” denote for Halogen Free Product
Absolute Maximum Rating
(Ta = 25
o
C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current *
Repetitive avalanche Current
TS
M2
TS
M2 N7
No
N7 0CH
tR
eco 0CP C5
mm RO G
en G
de
d
Package
TO-220
TO-251
TO-251
TO-252
TO-252
Block Diagram
Packing
50pcs / Tube
70pcs / Tube
70pcs / Tube
2.5Kpcs / 13” Reel
2.5Kpcs / 13” Reel
N-Channel MOSFET
Symbol
V
DS
V
GS
I
D
I
DM
I
AR
E
AS
P
TOT
T
J
T
STG
Limit
Unit
V
V
A
A
A
mJ
W
ºC
o
C
Single Pulse Avalanche Energy (Note 2)
o
Maximum Power Dissipation @T
C
= 25 C
Operating Junction Temperature
Storage Temperature Range
* Limited by maximum junction temperature
700
±30
2
8
2
110
45
150
-55 to +150
Thermal Performance
Parameter
Thermal Resistance - Junction to Case
Thermal Resistance - Junction to Ambient
Notes: Surface mounted on FR4 board t
≤
10sec
Symbol
RӨ
JC
RӨ
JA
Limit
2.78
100
Unit
o
o
C/W
C/W
1/10
Version: B11
TSM2N70
700V N-Channel Power MOSFET
Electrical Specifications
(Ta = 25
o
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Drain-Source On-State Resistance
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage
Forward Transconductance
Diode Forward Voltage
Dynamic
b
Conditions
V
GS
= 0V, I
D
= 1mA
V
GS
= 10V, I
D
= 1A
V
DS
= V
GS
, I
D
= 50uA
V
DS
= 700V, V
GS
= 0V
V
GS
= ±20V, V
DS
= 0V
V
DS
= 15V, I
D
= 0.8A
I
S
= 1.6A, V
GS
= 0V
Symbol
BV
DSS
R
DS(ON)
V
GS(TH)
I
DSS
I
GSS
g
fs
V
SD
Q
g
Min
700
--
2
--
--
--
--
--
Typ
--
5.25
--
--
--
1.7
--
9.5
Max
--
6.5
4
1
±100
--
1.6
13
--
--
--
--
--
--
--
--
--
--
--
--
Unit
V
V
uA
nA
S
V
TS
M2
TS
M2 N7
No
N7 0CH
tR
eco 0CP C5
mm RO G
en G
de
d
V
DS
= 480V, I
D
= 2A,
V
GS
= 10V
Q
gs
--
Q
gd
--
V
DS
= 25V, V
GS
= 0V,
C
iss
--
f = 1.0MHz
C
oss
C
rss
--
--
t
d(on)
t
r
t
f
--
--
V
GS
= 10V, I
D
= 0.8A,
--
V
DD
= 350V, R
G
= 4.7
V
GS
= 0V, I
S
= 1.3A,
t
d(off)
t
fr
--
--
V
DD
= 25V
Q
fr
--
--
2/10
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
1.6
4.0
35
nC
320
4.5
Output Capacitance
Switching
c
pF
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Fall Time
Turn-Off Delay Time
18.4
35
32
nS
34
Reverse Recovery Time
474.2
5.16
nS
uC
A
Reverse Recovery Charge
2067.8
dI
F
/dt = 100A/us
Reverse Recovery Current
I
RRM
Notes:
1. Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
2. V
DD
= 50V, I
AS
=2A, L=56mH, R
G
=25
3. Pulse test: pulse width
≤300uS,
duty cycle
≤1.5%
4. Essentially Independent of Operating Temperature
5. For design reference only, not subject to production testing.
6. Switching time is essentially independent of operating temperature.
Version: B11
TSM2N70
700V N-Channel Power MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
On-Resistance vs. Junction Temperature
TS
M2
TS
M2 N7
No
N7 0CH
tR
eco 0CP C5
mm RO G
en G
de
d
3/10
Gate Charge
Source-Drain Diode Forward Voltage
Version: B11
TSM2N70
700V N-Channel Power MOSFET
Electrical Characteristics Curve
(Ta = 25
o
C, unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Maximum Safe Operating Area
TS
M2
TS
M2 N7
No
N7 0CH
tR
eco 0CP C5
mm RO G
en G
de
d
Normalized Thermal Transient Impedance, Junction-to-Ambient
4/10
Version: B11
TSM2N70
700V N-Channel Power MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveform
E
AS
Test Circuit & Waveform
TS
M2
TS
M2 N7
No
N7 0CH
tR
eco 0CP C5
mm RO G
en G
de
d
5/10
Version: B11
嵌入式系统
