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UCC1837
UCC2837
UCC3837
8-Pin N-FET Linear Regulator Controller
FEATURES
•
On Board Charge Pump to Drive
External N-MOSFET
•
Input Voltage as Low as 3V
•
Duty Ratio Mode Over Current
Protection
•
Extremely Low Dropout Voltage
•
Low External Parts Count
•
Output Voltages as Low as 1.5V
DESCRIPTION
The UCC3837 Linear Regulator Controller includes all the features re-
quired for an extremely low dropout linear regulator that uses an external
N-channel MOSFET as the pass transistor. The device can operate from
input voltages as low as 3V and can provide high current levels, thus pro-
viding an efficient linear solution for custom processor voltages, bus ter-
mination voltages, and other logic level voltages below 3V. The on board
charge pump creates a gate drive voltage capable of driving an external
N-MOSFET which is optimal for low dropout voltage and high efficiency.
The wide versatility of this IC allows the user to optimize the setting of
both current limit and output voltage for applications beyond or between
standard 3-terminal linear regulator ranges.
This 8-pin controller IC features a duty ratio current limiting technique that
provides peak transient loading capability while limiting the average
power dissipation of the pass transistor during fault conditions. See the
Application Section for detailed information.
BLOCK DIAGRAM
VDD
1
CS
8
CHARGE
PUMP
CURRENT SENSE
AMPLIFIER
140mV
+
CAP
2
LEVEL
SHIFT
5
VOUT
ERROR AMPLIFIER
6
FB
UVLO
CURRENT SENSE
COMPARATOR
100mV
+
TIMER
1.5V REF
3
GND
7
CT
4
COMP
UDG-99145
SLUS228A - AUGUST 1999
UCC1837
UCC2837
UCC3837
ABSOLUTE MAXIMUM RATINGS
All pins referenced to GND . . . . . . . . . . . . . . . . . –0.3V to +15V
CS, CT, FB . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VDD + 0.3V
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300°C
CONNECTION DIAGRAM
DIL-8, SOIC-8 (Top View)
J or N Package, D Package
Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations
and considerations of packages.
ELECTRICAL CHARACTERISTICS:
Unless otherwise specified, T
A
= –55°C to 125°C for the UCC1837, –25°C to 85°C
for the UCC2837 and 0°C to 70°C for UCC3837; VDD = 5V, C
T
= 10nF, C
CAP
= 100nF.
PARAMETER
Input Supply
Supply Current
Under Voltage Lockout
Minimum Voltage to Start
Minimum Voltage After Start
Hysteresis
Reference ( Note 1 )
V
REF
25°C
0°C to 70°C
–55°C to 125°C
Current Sense
Comparator Offset
Comparator Offset
Amplifier Offset
Input Bias Current
Current Fault Timer
CT Charge Current
CT Discharge Current
CT Fault Low Threshold
CT Fault Hi Threshold
Fault Duty Cycle
Error Amplifier
Input Bias Current
Open Loop Gain
Transconductance
Charge Current
Discharge Current
–10µA to 10µA
V
COMP
= 6V
V
COMP
= 6V
60
2
20
10
0.5
90
5
40
25
8
60
40
2
µA
dB
mMho
µA
µA
V
CT
= 1V
V
CT
= 1V
16
0.4
0.4
1.3
2
36
1.2
0.5
1.5
3.3
56
1.9
0.6
1.7
5
µA
µA
V
V
%
V
CS
= 5V
0°C to 70°C
–55°C to 125°C
90
85
120
100
100
140
0.5
110
115
160
5
mV
mV
mV
µA
1.485
1.470
1.455
1.5
1.5
1.5
1.515
1.530
1.545
V
V
V
2.00
1.6
0.25
2.65
2.2
0.45
3.00
2.6
0.65
V
V
V
VDD = 5V
VDD = 10V
1
1.2
1.5
2
mA
mA
TEST CONDITIONS
MIN
TYP
MAX UNITS
2
UCC1837
UCC2837
UCC3837
ELECTRICAL CHARACTERISTICS:
Unless otherwise specified, T
A
= –55°C to 125°C for the UCC1837, –25°C to 85°C
for the UCC2837 and 0°C to 70°C for UCC3837; VDD = 5V, C
T
= 10nF, C
CAP
= 100nF.
PARAMETER
FET Driver
Peak Output Current
Average Output Current
Max Output Voltage
V
CAP
= 10V, VOUT = 1V
VOUT = 1V
VDD = 4.5V, I
OUT
= 0µA
VDD = 4.5V, I
OUT
= 10µA, 0°C to 70°C
VDD = 4.5V, I
OUT
= 10µA, –55°C to 125°C
Charge Pump
CAP Voltage
VDD = 4.5V, C/S = 0V
VDD = 12V, C/S = 0V
11
12.5
15
16.5
V
V
0.5
25
8.4
8
7.5
1.5
100
9.7
9
9
2.5
175
mA
µA
V
V
V
TEST CONDITIONS
MIN
TYP
MAX UNITS
Note 1: This is defined as the voltage on FB which results in a DC voltage of 8V on VOUT.
PIN DESCRIPTIONS
CAP:
The output of the charge pump circuit. A capacitor
is connected between this pin and GND to provide a
floating bias voltage for an N-Channel MOSFET gate
drive. A minimum of a 0.01µF ceramic capacitor is rec-
ommended. CAP can be directly connected to an exter-
nal regulated source such as +12V, in which case the
external voltage will be the source for driving the
N-Channel MOSFET.
COMP:
The output of the transconductance error ampli-
fier and current sense amplifier. Used for compensating
the small signal characteristics of the voltage loop (and
current loop when Current Sense Amplifier is active in
over curret mode).
CS:
The negative current sense input signal. This pin
should be connected through a low noise path to the low
side of the current sense resistor.
CT:
The input to the duty cycle timer circuit. A capacitor
is connected from this pin to GND, setting the maximum
ON time of the over current protection circuits. See the
Application Section for programming instructions.
FB:
The inverting terminal of the voltage error amplifier,
used to feedback the output voltage for comparison with
the internal reference voltage. The nominal DC operating
voltage at this pin is 1.5V
GND:
Ground reference for the device. For accurate out-
put voltage regulation, GND should be referenced to the
output load ground.
VDD:
The system input voltage is connected to this
point. VDD must be above 3V. VDD also acts as one
side of the Current Sense Amplifier and Comparator.
VOUT:
This pin directly drives the gate of the external
N-MOSFET pass element. The typical output impedance
of this pin is 6.5kΩ.
APPLICATION INFORMATION
Topology and General Operation
Unitrode Application Note U-152 is a detailed design of a
low dropout linear regulator using an N-channel
MOSFET as a pass element, and should be used as a
guide for understanding the operation of the circuit
shown in Fig. 1.
Charge Pump Operation
The internal charge pump of the UCC3837 is designed to
create a voltage equal to 3 times the input VDD voltage
at the CAP pin. There is an internal 5V clamp at the input
of the charge pump however that insures the voltage at
CAP does not exceed the ratings of the IC. This CAP
voltage is used to provide gate drive current to the exter-
nal pass element as well as bias current to internal sec-
3
tions of the UCC3837 itself. The charge pump output has
a typical impedance of 80kΩ and therefore the loading of
the IC and the external gate drive reduces the voltage
from its ideal level. The UCC3837 can operate in several
states including having the error amplifier disabled (shut
down), in normal linear regulation mode, and in overdrive
mode where the linear regulator is responding to a tran-
sient load or line condition. The maximum output voltage
available at VOUT is shown in Fig. 2 for these various
modes of operation.
The charge pump output is designed to supply 10µA of
average current to the load which is typically the
MOSFET gate capacitance present at the VOUT pin.The
capacitor value used at CAP is chosen to provide holdup
UCC1837
UCC2837
UCC3837
APPLICATION INFORMATION
5V
R1
0.020
15
14
OVERDRIVE
LINEAR REGULATOR
E/A DISABLED
C1
330µF
1
UCC3837
CS
VDD
VOUT
5
8
Q1
IRL2203N
OR EQUIVALENT
3.3V
R2
1.8k
FB
6
R3
1.5k
C3
1000µF
13
12
11
VOUT
10
9
8
7
6
5
ON/OFF
Q1
0.1µF
2
CAP
7
0.1µF
R
COMP
10k
C
COMP
820pF
4
CT
COMP
GND
3
3
4
5
6
7
VDD
8
9
10
11
12
Figure 2. Typical V
OUT(max)
vs. VDD.
UDG-99137
Figure 1. Typical application 5V to 3.3V, 5A
of the CAP voltage should the external load exceed the
average current, which occurs during load and line tran-
sient conditions. The value of CAP also determines the
startup time of the linear regulator. The voltage at CAP
charges up with a time constant determined by the
charge pump output impedance (typically 80kΩ) and the
value of the capacitor on CAP.
An external voltage such as +12V may be tied to the
CAP pin directly to insure a higher value of VOUT, which
may be useful when a standard level MOSFET is used or
when VDD is very low and the resulting VOUT voltage
may need to be higher. With an external source applied
to CAP, the maximum voltage at VOUT will be approxi-
mately 1V below the external source.The external +12V
source should be decoupled to GND using a minimum of
a 0.01µF capacitor.
Choosing a Pass Element
The UCC3837 is designed for use with an N-channel
MOSFET pass element only. The designer may choose
a logic level or standard gate level MOSFET depending
on the input voltage, the required gate drive, and the
available voltage at VOUT as discussed previously.
MOSFET selection should be based on required dropout
voltage and gate drive characteristics. A lower R
DS(on)
MOSFET is used when low dropout is required, but this
type of MOSFET will have higher gate capacitance which
may result in a slower transient response.
A MOSFET used in linear regulation is typically operated
at a gate voltage between the threshold voltage and the
gate plateau voltage in order to maintain high gain. This
4
mode of operation is linear, and therefore the channel re-
sistance is higher than the manufacturer’s published
R
DS(on)
value. The MOSFET should only be operated in
the non-linear (switch) mode under transient conditions,
when minimum dropout voltage is required.
Disabling the UCC3837
Grounding the CAP pin will remove the drive voltage and
effectively disable the output voltage. The device used to
short the output of CAP should have a very low leakage
current when in the OPEN state, since even a few
microamps will lower the charge pump voltage.
A second method of disabling the UCC3837 is to place a
short circuit across C
COMP
. This will have an advantage
of a quicker restart time as the voltage at CAP will not be
completely discharged. The charge pump will be loaded
down by the typical 40µA charging current of the error
amplifier with this configuration, resulting in a lower volt-
age at CAP.
Compensating the Error Amplifier
Using a MOSFET as an external pass element intro-
duces a pole in the control loop that is a function of the
UCC3837 output impedance, R
OUT
, typically 6.5kΩ, and
the MOSFET input gate capacitance. Fig. 3 indicates
that in the normal operation of a linear regulator using a
MOSFET, the gate capacitance can be predicted directly
from the MOSFET characteristic charge curve, using the
relationship:
C
IN
=
∆
Qgth
∆
Vgth
This pole can be canceled by programming a zero fre-
quency on the output of the UCC3837 error amplifier
equal to the pole frequency. Therefore:
