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UPD61P24GS

Microcontroller, 4-Bit, OTPROM, MOS, PDSO20, 0.300 INCH, PLASTIC, SOP-20

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:NEC(日电)

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器件参数
参数名称
属性值
厂商名称
NEC(日电)
零件包装代码
SOIC
包装说明
SOP,
针数
20
Reach Compliance Code
unknown
具有ADC
NO
位大小
4
最大时钟频率
4.19 MHz
DAC 通道
NO
DMA 通道
NO
JESD-30 代码
R-PDSO-G20
长度
12.8 mm
I/O 线路数量
8
端子数量
20
最高工作温度
75 °C
最低工作温度
-20 °C
PWM 通道
NO
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
认证状态
Not Qualified
ROM可编程性
OTPROM
座面最大高度
1.8 mm
最大供电电压
6.25 V
最小供电电压
5.75 V
标称供电电压
6 V
表面贴装
YES
技术
MOS
温度等级
COMMERCIAL EXTENDED
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
宽度
5.6 mm
uPs/uCs/外围集成电路类型
MICROCONTROLLER
Base Number Matches
1
文档预览
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD61P24
4-BIT SINGLE-CHIP MICROCONTROLLER
FOR REMOTE CONTROL TRANSMISSION
DESCRIPTION
The
µ
PD61P24 is a 4-bit single-chip microcontroller for infrared remote controllers for TVs, VCRs, stereos, cassette
decks, air conditioners, etc.
As the
µ
PD61P24 is user-programmable, it is ideal for evaluation of programs running in a
µ
PD6124A or 6600A,
and for small-scale production of such systems.
The functions of the
µ
PD61P24 are described in detail in the following User’s Manual. Be sure to read this
manual before designing your system.
µ
PD612X Series User’s Manual: IEP-1083
FEATURES
• Transmitter for programmable infrared remote control-
ler
• 19 types of instructions
• Instruction execution time: 17.6
µ
s (with 455-kHz ce-
ramic resonator)
• On-chip one-time PROM: 1002
×
10 bits
• Data memory (RAM) capacity
• I/O pins (K
I/O
): 8 pins
• Input pins (K
I
): 4 pins
: 32
×
5 bits
• 9-bit programmable timer: 1 channel
• Serial input pins (S-IN): 1 pin
• Transmission-in-progress indication pin (S-OUT): 1
pin
• Transmit carrier frequency (REM)
f
OSC
/12, f
OSC
/8
• Standby operation (HALT/STOP mode)
• Low power consumption
• Current consumption in STOP mode (T
A
= 25°C)
1
µ
A MAX.
• Low-voltage operation: V
DD
= 2.2 to 5.5 V
Caution To use the NEC transmission format, ask NEC to supply the custom code.
Do no use R
0
when using a register as an operand of the branch instruction.
The information in this document is subject to change without notice.
Document No. U12629EJ4V0DS00 (4th edition)
Previous No. IC-2876
Date Published July 1997 N
Printed in Japan
The mark
shows major revised points.
©
1997
µ
PD61P24
ORDERING INFORMATION
Part Number
Package
20-pin plastic shrink DIP (300 mil)
20-pin plastic SOP (300 mil)
µ
PD61P24CS
µ
PD61P24GS
PIN CONFIGURATION (Top View)
(1) Normal operating mode
(2) PROM programming mode
K
I/O1
1
K
I/O0
2
S-IN 3
S-OUT 4
REM 5
V
DD
6
OSC-OUT 7
OSC-IN 8
V
SS
9
AC 10
20 K
I/O2
19 K
I/O3
18 K
I/O4
17 K
I/O5
16 K
I/O6
15 K
I/O7
14 K
I0
13 K
I1
12 K
I2
11 K
I3
D1 1
D0 2
V
PP
3
(Open) 4
(Open) 5
V
DD
6
(Open) 7
CLK 8
V
SS
9
(L) 10
20 D2
19 D3
18 D4
17 D5
16 D6
15 D7
14 MD0
13 MD1
12 MD2
11 MD3
Caution Round brackets ( ) indicate the pins not used in the PROM programming mode.
L
: Connect each of these pins to GND via a resistor (470
Ω).
Open: Leave these pins open.
2
µ
PD61P24
BLOCK DIAGRAM
ROM
D.P.
ROM
D.P.
PC(L)
PC(H)
L
H
1002
×
10 bits
One-Time
PROM
(L)
One-Time
PROM
(H)
32
×
5 bits
SP
ADD
DEC
M
P
X
RAM
RAM
CNTL CNTL
(L)
(H)
M
P
X
TIMER TIMER
(L)
(H)
10 bits
OSC
MOD
ALU
ACC
KEY
KEY
OUT(L) OUT(H)
KEY
IN
Watchdog
timer
function
OSC-IN S-OUT REM
OSC-OUT
S-IN
K
I/O0
-K
I/O7
K
I0
-K
I3
AC
3
µ
PD61P24
1.
PROGRAM COUNTER (PC) ……… 10 BITS
The program counter (PC) is a binary counter, which holds the address information for the program memory.
Figure 1-1. Program Counter Organization
PC
9
PC
8
PC
7
PC
6
PC
5
PC
4
PC
3
PC
2
PC
1
PC
0
PC
Normally, the program counter contents are automatically incremented each time an instruction is executed,
according to the number of instruction bytes.
When executing a jump instruction (JMP0, JC, JF), the program counter indicates the jump destination.
Immediate data or the data memory contents are loaded to all or some bits of the PC.
When executing the call instruction (CALL0), the PC contents are incremented (+1) and saved into the stack
memory. Then, a value needed for each jump instruction will be loaded.
When executing the return instruction (RET), the stack memory contents are double incremented (+2) and loaded
into the PC.
When “all clear” is input or on reset, the PC contents are cleared to “000H”.
2.
STACK POINTER (SP) ……… 2 BITS
This 2-bit register holds the start address information for the stack area. The stack area is shared with the data
memory.
The SP contents are incremented, when the call instruction (CALL0) is executed. They are decremented, when
the return instruction (RET) is executed.
The stack pointer is cleared to “00B” after reset or “all clear” is input, and indicates the highest address FH for
the data memory as the stack area.
The figure below shows the relationship for the stack pointer and the data memory area.
Data memory
R
C
R
D
R
E
R
F
(SP)
11B
10B
01B
00B
If the stack pointer overflows or underflows, it is determined that the CPU overflows, and the PC internal reset
signal will be generated.
4
µ
PD61P24
3.
PROGRAM MEMORY (ROM) ……… 1002 STEPS
×
10 BITS
The program memory (ROM) is configured in 10 bits steps. It is addressed by the program counter.
Program and table data are stored in the program memory.
Figure 3-1. Program Memory Map
000H
0FFH
100H
1FFH
200H
2FFH
300H
3E9H
3EAH
3FFH
Test program
area
4.
DATA MEMORY (RAM) ……… 32 WORDS
×
5 BITS
The data memory is a RAM of 32 words
×
5 bits. The data memory stores processing data. In some cases, the
data memory is processed in 8-bit units. R
0
may be used as the data pointer for the ROM.
After power application, the RAM will be undefined. The RAM retains the previous data on reset.
Figure 4-1. Data Memory Organization
1
0
R
0
.
.
.
R
B
R
C
.
.
.
R
F
SP–3
SP–2
SP–1
SP–0
Caution Avoid using the RAM areas R
D
, R
E
, and R
F
in a CALL routine as much as possible because these
areas are also used as stack memory areas (to prevent program hang-up in case the value of the
SP is destroyed due to some reason such as noise).
When using these RAM areas as general-purpose RAM areas, be sure to include stack pointer
checking in the main routine.
5
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参数对比
与UPD61P24GS相近的元器件有:UPD61P24CS。描述及对比如下:
型号 UPD61P24GS UPD61P24CS
描述 Microcontroller, 4-Bit, OTPROM, MOS, PDSO20, 0.300 INCH, PLASTIC, SOP-20 Microcontroller, 4-Bit, OTPROM, MOS, PDIP20, 0.300 INCH, SHRINK, PLASTIC, DIP-20
厂商名称 NEC(日电) NEC(日电)
零件包装代码 SOIC DIP
包装说明 SOP, 0.300 INCH, SHRINK, PLASTIC, DIP-20
针数 20 20
Reach Compliance Code unknown unknown
具有ADC NO NO
位大小 4 4
最大时钟频率 4.19 MHz 4.19 MHz
DAC 通道 NO NO
DMA 通道 NO NO
JESD-30 代码 R-PDSO-G20 R-PDIP-T20
I/O 线路数量 8 8
端子数量 20 20
最高工作温度 75 °C 75 °C
最低工作温度 -20 °C -20 °C
PWM 通道 NO NO
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP SDIP
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE IN-LINE, SHRINK PITCH
认证状态 Not Qualified Not Qualified
ROM可编程性 OTPROM OTPROM
座面最大高度 1.8 mm 5.08 mm
最大供电电压 6.25 V 6.25 V
最小供电电压 5.75 V 5.75 V
标称供电电压 6 V 6 V
表面贴装 YES NO
技术 MOS MOS
温度等级 COMMERCIAL EXTENDED COMMERCIAL EXTENDED
端子形式 GULL WING THROUGH-HOLE
端子节距 1.27 mm 1.778 mm
端子位置 DUAL DUAL
宽度 5.6 mm 7.62 mm
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