W25Q64JV
3V 64M-BIT
SERIAL FLASH MEMORY WITH
DUAL, QUAD SPI
Publication Release Date: November 22, 2017
Revision I
W25Q64JV
Table of Contents
1.
2.
3.
GENERAL DESCRIPTIONS .................................................................................................................. 4
FEATURES ............................................................................................................................................ 4
PACKAGE TYPES AND PIN CONFIGURATIONS ............................................................................... 5
3.1
Pin Configuration SOIC 208-mil ................................................................................................ 5
3.2
Pad Configuration WSON 6x5-mm/ 8x6-mm, XSON 4x4-mm .................................................. 5
3.3
Pin Description SOIC 208-mil, WSON 6x5-mm/ 8x6-mm, XSON 4x4-mm ............................... 5
3.4
Pin Configuration SOIC 300-mil ................................................................................................ 6
3.5
Pin Description SOIC 300-mil .................................................................................................... 6
3.6
Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ...................................................... 7
3.7
Ball Description TFBGA 5x5 or 8x6-mm ................................................................................... 7
3.8
Ball Configuration WLCSP ........................................................................................................ 8
3.9
Ball Description WLCSP12 ........................................................................................................ 8
PIN DESCRIPTIONS ............................................................................................................................. 9
4.1
Chip Select (/CS) ....................................................................................................................... 9
4.2
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ......................................... 9
4.3
Write Protect (/WP).................................................................................................................... 9
4.4
HOLD (/HOLD) .......................................................................................................................... 9
4.5
Serial Clock (CLK) ..................................................................................................................... 9
4.6
Reset (/RESET)
(1)
...................................................................................................................... 9
BLOCK DIAGRAM ...............................................................................................................................10
FUNCTIONAL DESCRIPTIONS ..........................................................................................................11
6.1
Standard SPI Instructions ........................................................................................................11
6.2
Dual SPI Instructions ...............................................................................................................11
6.3
Quad SPI Instructions..............................................................................................................11
6.4
Software Reset & Hardware /RESET pin ................................................................................11
6.5
Write Protection .......................................................................................................................12
Write Protect Features ............................................................................................................... 12
4.
5.
6.
7.
STATUS AND CONFIGURATION REGISTERS .................................................................................13
7.1
Status Registers ......................................................................................................................13
Erase/Write In Progress (BUSY)
–
Status Only
...................................................................... 13
Write Enable Latch (WEL)
–
Status Only
................................................................................ 13
Block Protect Bits (BP2, BP1, BP0)
–
Volatile/Non-Volatile Writable
...................................... 13
Top/Bottom Block Protect (TB)
–
Volatile/Non-Volatile Writable
............................................. 14
Sector/Block Protect Bit (SEC)
–
Volatile/Non-Volatile Writable
............................................. 14
Complement Protect (CMP)
–
Volatile/Non-Volatile Writable
................................................. 14
Status Register Protect (SRP, SRL)
–
Volatile/Non-Volatile Writable
..................................... 15
Erase/Program Suspend Status (SUS)
–
Status Only
............................................................ 16
Security Register Lock Bits (LB3, LB2, LB1)
–
Volatile/Non-Volatile OTP Writable
................ 16
Quad Enable (QE)
–
Volatile/Non-Volatile Writable
................................................................ 16
Write Protect Selection (WPS)
–
Volatile/Non-Volatile Writable
............................................. 17
Output Driver Strength (DRV1, DRV0)
–
Volatile/Non-Volatile Writable
................................. 17
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Publication Release Date: November 22, 2017
Revision I
W25Q64JV
Reserved Bits
–
Non Functional
............................................................................................. 17
Status Register Memory Protection (WPS = 0, CMP = 0) .......................................................... 18
Status Register Memory Protection (WPS = 0, CMP = 1) .......................................................... 19
Individual Block Memory Protection (WPS=1) ......................................................................... 20
8.
INSTRUCTIONS ..................................................................................................................................21
8.1
Device ID and Instruction Set Tables ......................................................................................21
Manufacturer and Device Identification ...................................................................................... 21
Instruction Set Table 1 (Standard SPI Instructions)
(1)
................................................................ 22
Instruction Set Table 2 (Dual/Quad SPI Instructions)
(1)
.............................................................. 23
8.2
Instruction Descriptions ...........................................................................................................24
Write Enable (06h) ..................................................................................................................... 24
Write Enable for Volatile Status Register (50h).......................................................................... 24
Write Disable (04h) .................................................................................................................... 25
Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) .................... 25
Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) .................... 26
Read Data (03h) ........................................................................................................................ 28
Fast Read (0Bh) ........................................................................................................................ 29
Fast Read Dual Output (3Bh) .................................................................................................... 30
Fast Read Quad Output (6Bh) ................................................................................................... 31
Fast Read Dual I/O (BBh) ........................................................................................................ 32
Fast Read Quad I/O (EBh)....................................................................................................... 33
Set Burst with Wrap (77h) ........................................................................................................ 34
Page Program (02h) ................................................................................................................ 35
Quad Input Page Program (32h).............................................................................................. 36
8.3
Sector Erase (20h) ..................................................................................................................37
32KB Block Erase (52h)............................................................................................................. 38
64KB Block Erase (D8h) ............................................................................................................ 39
Chip Erase (C7h / 60h) .............................................................................................................. 40
Erase / Program Suspend (75h) ................................................................................................ 41
Erase / Program Resume (7Ah) ................................................................................................. 42
Power-down (B9h) ..................................................................................................................... 43
Release Power-down / Device ID (ABh) .................................................................................... 44
Read Manufacturer / Device ID (90h) ........................................................................................ 45
Read Manufacturer / Device ID Dual I/O (92h) .......................................................................... 46
Read Manufacturer / Device ID Quad I/O (94h) ....................................................................... 47
Read Unique ID Number (4Bh) ................................................................................................ 48
Read JEDEC ID (9Fh) ............................................................................................................. 49
Read SFDP Register (5Ah)...................................................................................................... 50
Erase Security Registers (44h) ................................................................................................ 51
Program Security Registers (42h) ............................................................................................ 52
Read Security Registers (48h) ................................................................................................. 53
Individual Block/Sector Lock (36h) ........................................................................................... 54
Individual Block/Sector Unlock (39h) ....................................................................................... 55
Read Block/Sector Lock (3Dh)................................................................................................. 56
Global Block/Sector Lock (7Eh) ............................................................................................... 57
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Publication Release Date: November 22, 2017
Revision I
W25Q64JV
Global Block/Sector Unlock (98h) ............................................................................................ 57
Enable Reset (66h) and Reset Device (99h) ........................................................................... 58
9.
ELECTRICAL CHARACTERISTICS....................................................................................................59
9.1
Absolute Maximum Ratings (1) ...............................................................................................59
9.2
Operating Ranges ...................................................................................................................59
9.3
Power-Up Power-Down Timing and Requirements ................................................................60
9.4
DC Electrical Characteristics- ..................................................................................................61
9.5
AC Measurement Conditions ..................................................................................................62
9.6
AC Electrical Characteristics
(6)
................................................................................................63
9.7
Serial Output Timing ................................................................................................................65
9.8
Serial Input Timing...................................................................................................................65
9.9
/WP Timing ..............................................................................................................................65
PACKAGE SPECIFICATIONS ............................................................................................................66
10.1 8-Pin SOIC 208-mil (Package Code SS) .................................................................................66
10.2 8-Pad WSON 6x5-mm (Package Code ZP) ............................................................................67
10.3 8-Pad WSON 8x6mm (Package Code ZE) .............................................................................68
10.4 8-Pad XSON 4x4x0.45-mm (Package Code XG) ...................................................................69
10.5 16-Pin SOIC 300-mil (Package Code SF) ...............................................................................70
10.7 24-Ball TFBGA 8x6-mm (Package Code TB, 5x5 Ball Array) .................................................71
10.8 24-Ball TFBGA 8x6-mm (Package Code TC, 6x4 ball array)..................................................72
10.9 12-Ball WLCSP (Package Code BY) .......................................................................................73
ORDERING INFORMATION ...............................................................................................................74
11.1 Valid Part Numbers and Top Side Marking .............................................................................75
REVISION IISTORY ............................................................................................................................76
10.
11.
12.
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Publication Release Date: November 22, 2017
Revision I
W25Q64JV
1.
GENERAL DESCRIPTIONS
The W25Q64JV (64M-bit) Serial Flash memory provides a storage solution for systems with limited space,
pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices.
They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing
voice, text and data. The device operates on 2.7V to 3.6V power supply with current consumption as low as
1µA for power-down. All devices are offered in space-saving packages.
The W25Q64JV array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can
be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB
block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64JV has 2,048
erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in
applications that require data and parameter storage. (See Figure 2.)
The W25Q64JV supports the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI: Serial Clock, Chip
Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 and I/O3. SPI clock frequencies of W25Q64JV of up to 133MHz
are supported allowing equivalent clock rates of 266MHz (133MHz x 2) for Dual I/O and 532MHz (133MHz x
4) for Quad I/O when using the Fast Read Dual/Quad I/O. These transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories.
Additionally, the device supports JEDEC standard manufacturer and device ID, and a 64-bit Unique Serial
Number and three 256-bytes Security Registers.
2. FEATURES
New Family of SpiFlash Memories
– W25Q64JV: 64M-bit / 8M-byte
– Standard SPI: CLK, /CS, DI, DO
– Dual SPI: CLK, /CS, IO
0
, IO
1
– Quad SPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
– Software & Hardware Reset
(1)
Highest Performance Serial Flash
– 133MHz Single, Dual/Quad SPI clocks
266/532MHz equivalent Dual/Quad SPI
– Min. 100K Program-Erase cycles per sector
– More than 20-year data retention
Efficient “Continuous Read”
– Continuous Read with 8/16/32/64-Byte Wrap
– As few as 8 clocks to address memory
– Allows true XIP (execute in place) operation
– Outperforms X16 Parallel Flash
Low Power, Wide Temperature Range
– Single 2.7 to 3.6V supply
– <1µA Power-down (typ.)
– -40°C to +85°C operating range
Flexible Architecture with 4KB sectors
– Uniform Sector/Block Erase (4K/32K/64K-Byte)
– Program 1 to 256 byte per programmable page
– Erase/Program Suspend & Resume
Advanced Security Features
– Software and Hardware Write-Protect
– Special OTP protection
– Top/Bottom, Complement array protection
– Individual Block/Sector array protection
– 64-Bit Unique ID for each device
– Discoverable Parameters (SFDP) Register
– 3X256-Bytes Security Registers
– Volatile & Non-volatile Status Register Bits
Space Efficient Packaging
– 8-pin SOIC 208-mil
– 8-pad WSON 6x5-mm/8x6-mm
– 16-pin SOIC 300-mil
– 8-pad XSON 4x4-mm
– 24-ball TFBGA 8x6-mm (6x4 ball array)
– 24-ball TFBGA 8x6-mm (6x4/5x5 ball array)
– 12-ball WLCSP
– Contact Winbond for KGD and other options
Note: 1. Hardware /RESET pin is only available on TFBGA or SOIC16 packages
-4-
Publication Release Date: November 22, 2017
Revision I
