W7500x Data Sheet
Version 1.0.6
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© Copyright 2017 WIZnet Co., Ltd. All rights reserved.
Table of Contents
Table of Contents .......................................................................................... 2
List of table ................................................................................................. 4
List of figures ............................................................................................... 5
1 Introduction ............................................................................................. 6
2 Description............................................................................................... 7
3 Functional overview ................................................................................... 9
3.1
3.2
3.3
3.4
3.5
ARM® -Cortex® -M0 core with embedded Flash and SRAM ............................. 9
Memories ...................................................................................... 9
Boot modes .................................................................................... 9
System configuration controller (SYSCFG) ............................................. 10
Power management ........................................................................ 10
3.5.1
3.5.2
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.7
3.7.1
3.7.2
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
Power supply schemes ............................................................. 10
Low-power modes .................................................................. 10
External Oscillator Clock .......................................................... 12
RC oscillator clock .................................................................. 12
PLL .................................................................................... 12
Generated clock .................................................................... 12
Nested vectored interrupt controller (NVIC) .................................. 13
Event controller .................................................................... 13
Clocks and startup ......................................................................... 11
Interrupts and events ..................................................................... 13
Tcp/ip offload engine (TOE) .............................................................. 13
General-purpose inputs/outputs (GPIOs) .............................................. 14
Pad controller (PADCON) .................................................................. 14
Alternative function controller (AFC) .................................................. 16
External interrupt (EXTI) ................................................................. 18
Direct memory access controller (DMA) ................................................ 19
Analog to digital converter (ADC) ....................................................... 19
Timers and watchdogs ..................................................................... 20
3.15.1
3.15.2
3.15.3
3.15.4
System tick timer ................................................................... 20
Pulse-Width Modulation (PWM) .................................................. 20
Dual timers .......................................................................... 20
Watchdog timer ..................................................................... 21
RTC clock ............................................................................ 21
RTC interrupt ........................................................................ 21
3.16
Real-time clock (RTC) ..................................................................... 21
3.16.1
3.16.2
3.17
Universal asynchronous receiver/transmitter (UART) ............................... 22
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W7500x Data Sheet Version1.0.6
3.18
3.19
4.1
4.2
Synchronous Serial Port (SSP) ............................................................ 22
Random number generator (RNG) ....................................................... 23
Pin layout .................................................................................... 24
Pin descriptions ............................................................................. 25
4.2.1
4.2.2
W7500 Pin Description ............................................................. 25
W7500P Pin Description ........................................................... 28
4 Pinout and descriptions .............................................................................. 24
5 Electrical characteristics ............................................................................ 31
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
6.1
Absolute maximum ratings ............................................................... 31
Voltage Characteristics.................................................................... 31
Current Characteristics ................................................................... 31
Thermal Characteristics .................................................................. 32
Operating conditions ...................................................................... 32
5.5.1
General Operating Conditions .................................................... 32
Supply Current Characteristics .......................................................... 33
I/O PAD Characteristics ................................................................... 34
Electrical Sensitivity Characteristics ................................................... 34
Reset & PLL Characteristics .............................................................. 35
ADC Characteristics ........................................................................ 36
SSP Interface Characteristics ............................................................ 38
Package dimension information ......................................................... 39
6 Package Information .................................................................................. 39
Document History Information ......................................................................... 40
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List of table
Table 1. W7500/W7500P family device features and peripheral counts .................. 7
Table 2 operation of mode selection ............................................................ 9
Table 3 W7500x sleep mode summary ........................................................ 10
Table 4 functional description table .......................................................... 16
Table 5 Summary of the DMA requests for each channel .................................. 19
Table 6. Pin Type Notation ...................................................................... 25
Table 7 W7500 Pin Description ................................................................. 25
Table 8. W7500P Pin Description ............................................................... 28
Table 9 Voltage characteristics ................................................................. 31
Table 10 Current characteristics ............................................................... 31
Table 11 Thermal Charateristics ............................................................... 32
Table 12 General operating conditions ....................................................... 32
Table 13 Normal operation supply current ................................................... 33
Table 14 Sleep mode supply current .......................................................... 33
Table 15 Deep sleep mode supply current ................................................... 33
Table 16 DC specification of PAD ............................................................... 34
Table 17 Flash memory Reliability Characteristics .......................................... 34
Table 18 Electrostatic discharge (ESD) ........................................................ 34
Table 19 Static latch-up ......................................................................... 34
Table 20 PLL electrical characteristics........................................................ 35
Table 21 ADC electrical characteristics ....................................................... 36
Table 22 SSP characteristics .................................................................... 38
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List of figures
Figure 1. W7500x System Architecture ......................................................... 8
Figure 2. CRG block diagram ................................................................... 11
Figure 3 Typical application with an 8 MHz crystal ......................................... 12
Figure 4. function schematic of digital I/O pad ............................................. 14
Figure 5. function schematic of digital/analog mux IO pad .............................. 14
Figure 6. External Interrupt diagram .......................................................... 18
Figure 7 W7500 pin layout ...................................................................... 24
Figure 8 W7500P pin layout ..................................................................... 24
Figure 9 Power Down operation Timing Sequence for PLL ................................ 35
Figure 10. ADC transform function ............................................................ 37
Figure 11. SSP Timing for SPI Frame format, with SPH =1 ................................. 38
Figure 12. Package Dimension Information .................................................. 39
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