W91570DN SERIES
23-MEMORY TONE/PULSE DIALER WITH
AUTOREDIAL RTC AND LCD DISPLAY FUNCTIONS
GENERAL DESCRIPTION
The W91570DN series ICs are Si-gate CMOS ICs that provide the signals needed for either pulse or
tone dialing. They feature 23 number memories and a 16-digit LCD driver for displaying telephone
numbers and calling time. A real time clock is included to display the time of day. The W91570DN
series is fabricated using CMOS technology providing good performance in low voltage, low power
applications.
FEATURES
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Three by 32 digits for redial, save and mercury memory
Twenty by 16 digits for one-touch direct or two-touch indirect repertory memory
Uses 6
×
10 keyboard
Pause, Pulse-to-tone (*/T) and flash can be stored as a digit in memory
Minimum tone output duration: 87 mS
Minimum intertone pause: 87 mS
Tone/Pulse mode pin selectable
Make/Break ratio pin selectable
Dialing rate (10 or 20 ppS) pin selectable
Pause time (2.0 or 3.6 Sec) selectable by keypad
Flash break time (100, 300, or 600 mS) selectable by keypad
Built-in 12 or 16-digit LCD driver
(1/4
duty, 1/3 bias) selectable by mask option
Built-in calling timer from [00:00] to [59:59]
Uses 3.579545 MHz TV quartz crystal or ceramic resonator
Uses 32768 Hz crystal as RTC frequency base
Packaged in 80-pin plastic QFP with RTC
Provides one-key-redial and auto-redial functions
Switchable 24-hour clock or 12-hour clock with p.m. mode
0 or 9 dialing inhibition pin for PABX systems or long distance dialing lock out
On-hook debounce: 150 msec in normal mode and 20 msec in lock mode
Off-hook delay 300 mS in lock mode (i.e.
DP
will keep low for 300 mS while off hook)
First key-in delay: 300 msec in lock mode
MUTE key for speech mute
Cascade and mixed dialing allowed
The functions of the different dialers in the W91570DN series are shown in the following table:
PRODUCT NO.
W91572DNF
W91574DNF
W91576DNF
W91578DNF
LCD DIGITS
16
16
12
12
LOCK
√
√
√
√
RTC BATTERY
1.5V
3V
1.5V
3V
-1-
Publication Release Date: May 1997
Revision A2
W91570DN SERIES
PIN CONFIGURATION
41
65
80
25
1
PIN NAME
SEG29
SEG30
SEG31
SEG32
TEST
KMUTE
KT
TEST1
V
DD
QFP-80
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
COL2
COL3
COL4
COL5
COL6
COL7
COL8
COL9
ROW1
ROW2
ROW3
ROW4
ROW5
XT1
XT1
HKS
HFI
V
RTC1
TEST2
ARD
QFP-80
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
PIN NAME
TESTL
AP
SET
XT2
XT2
V
LCD
V
RTC2
QFP-80
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
PIN NAME
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
QFP-80
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
CN
CP
COM1
COM2
COM3
COM4
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
NC/
LOCK
B/M
DTMF
SET
RTC
V
SS
H/P MUTE
T/P
MUTE
HFO
DP
/
C10
MODE
COL1
-2-
W91570DN SERIES
PIN DESCRIPTION
SYMBOL
Row,
Column
Inputs
PIN NO.
29−33
and
20−28
I/O
I
FUNCTION
The keyboard inputs may be used with either the standard 6×10
keyboard, an inexpensive single contact (form A) keyboard or
electronic input.
A valid key entry is defined by a single row being connected to
a single column.
XT1,
XT
34, 35
I,
O
A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonater.
The oscillator ceases when a keypad input is not sensed after
chip enable and dialing is finished. The crystal frequency
deviation is
±0.02%.
T/P
MUTE
16
O
The T/P
MUTE
is a conventional CMOS N-channel open drain
output.
The output transistor is switched on low level during the dialing
sequence (both pulse and tone mode), one-key redial break,
auto redial break and flash break. Otherwise, it is switched off.
The H/P MUTE is a conventional CMOS inverter output. During
pulse dialing, one-key redial break, auto redial break, flash
break, hold, and mercury functions, this pin will output an active
high. It remains in a low state at all other times.
The
KMUTE
is a CMOS N-channel open drain output. The
output transistor is switched on only during mute function.
Otherwise, it is switched off.
Hook switch input.
HKS
= V
DD
or floating: On-hook state. Chip in sleeping mode,
no operation.
HKS
= V
SS
: Off-hook state. Chip enable for normal operation.
HKS
pin is pulled to V
DD
by internal resistor.
H/P MUTE
15
O
KMUTE
6
O
HKS
36
I
-3-
Publication Release Date: May 1997
Revision A2
W91570DN SERIES
Pin Description, continued
SYMBOL
HFI
, HFO
PIN NO.
37, 17
I/O
I,
O
FUNCTION
Handfree control pins. A low pulse on the
HFI
input pin toggles
the handfree control state.
Status of the handfree control is listed in the following table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
Off Hook
On Hook
Off Hook
Off Hook
Low
High
High
High
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
NEXT STATE
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
The
HFI
pin is pulled to V
DD
by internal resistor.
Detailed timing diagrams are shown in Figure 4(a), 4(b).
DP
/
C10
18
O
This pin is a CMOS N-channel open drain output. The flash key
will cause
DP
/
C10
to go active in either pulse mode or tone
mode. In lock mode, the
DP
/
C10
keeps low for 300 mS during
off-hook delay time (If first off-hook occured after power-on
reset, the
DP
/
C10
will keep high for 100ms then go low 200
mS. It will be recovered when first key-in was accepted). The
timing diagram is shown as Figure 1(a), 1(b), 1(c), 1(d).
In pulse mode, this pin remains in low state at all times.
In tone mode, it will output a dual or single tone. Detailed timing
diagram for tone mode is shown in Figure 2(a), 2(b), 2(c), 2(d).
OUTPUT FREQUENCY
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
DTMF
12
O
MODE
19
I
Pulling the mode pin to V
SS
places the dialer in tone mode.
Pulling the mode pin to V
DD
places the dialer in pulse mode
and the dialing rate is 10 ppS.
Floating the mode pin places the dialer in pulse mode and the
dialing rate is 20 ppS.
-4-
W91570DN SERIES
Pin Description, continued
SYMBOL
B/M
PIN NO.
11
I/O
I
FUNCTION
Make:Break ratio select pin.
If B/M = V
DD
, the M/B ratio is 40:60.
If B/M = V
SS
, the M/B ratio is 33.3:66.7.
The B/M pin is pulled to V
DD
by internal resistor.
LOCK
10
(for all lock
version)
I
The
LOCK
pin is used to prevent "0" or "9" dialing under PABX
system long distance call control. When the first key input after
reset is "0" or "9", all the key inputs, including "0" or "9" key,
become invalid, and the chip generates no output.
The telephone is reinitialized by a reset.
The following table describes the functions of the
LOCK
pin:
LOCK PIN
Floating
V
DD
V
SS
FUNCTION
Normal dialing
"0", "9" dialing inhibited
"0" dialing inhibited
COM1 to
COM4
SEG1 to
SEG32
V
LCD
CP, CN
49 to 52
53 to 80,
1 to 4
45
48, 47
O
O
O
COM1 to COM4 are the common signal output terminal for the
1/4 duty LCD.
SEG1 to SEG32 are the 16-digit segment signal outputs.
Power supply pin for LCD driver.
A 0.1
µF
capacitor is connected between V
LCD
and V
SS
.
CP is the voltage control capacitor positive pin.
I
V
DD
, V
SS
XT2,
XT2
V
RTC1
,
V
RTC2
9, 14
43, 44
38, 46
I
I,
O
I
CN is the voltage control capacitor negative pin.
A 0.1µF capacitor is connected between these two pins.
Power input pins.
A quartz crystal oscillator provides an RTC frequency time base
of 32.768 KHz.
Either V
RTC1
should be connected to a 1.5V battery
(W91572DN/576DN) or V
RTC2
should be connected to a 3.0V
battery(W91574DN/578DN), which supplies the power source
for the RTC.
In the chip enable state, pulling SET
RTC
to V
SS
toggles the
RTC set function on/off, when the set function is toggled on, the
RTC can be set using the "HOUR" and "MIN" keypads.
SET
RTC
13
I
-5-
Publication Release Date: May 1997
Revision A2
