W91590 SERIES
24-MEMORY TONE/PULSE SWITCHABLE DIALER
WITH HANDFREE, HOLD AND LOCK FUNCTIONS
GENERAL DESCRIPTION
The W91590 series dialers Si-gate CMOS IC tone/pulse switchable dialers with a 24-channel
automatic dialing memory, including a 16-digit
×
3 emergency dialing memory, a 16-digit
×
20
channel repertory memory that provides one-touch and three-touch dialing, and a 32-digit mercury
memory. These dialers also provide flash, clear, hold, and one-key redial functions.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
DTMF/Pulse switchable dialer
32-digit LNB (last number buffer) memory (both tone and pulse mode)
32-digit mercury memory (tone/pulse mode)
16-digit
×
3 one-touch direct repertory memory (tone/pulse mode)
16-digit
×
20 direct or indirect repertory memory (tone/pulse mode)
Uses 9
×
5 keyboard
Flash time: 98 mS, 305 mS, or 600 mS (selectable by keypad option)
Pause time: 3.6 sec.
Pause P→T (pulse-to-tone) can be stored as a digit in memory
Minimum tone output duration: 93 mS
Minimum intertone pause: 93 mS
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 22, 24 or 28-pin plastic DIP
The different dialers in the W91590 series are shown in the following table:
TYPE NO.
W91590
W91590L
W91590A
W91590AL
W91590B
W91590BL
W91590C
W91590CL
PULSE MEMORY
(ppS)
10
10
10
10
10/20
10/20
10/20
10/20
20
20
20
20
24
24
24
24
MERCURY
MEMORY
-
-
-
-
Yes
Yes
Save Memory
Save Memory
HOLD HANDFREE
-
-
-
-
Yes
Yes
Yes
Yes
-
-
Yes
Yes
Yes
Yes
Yes
Yes
LOCK
PACKAGE
FUNCTION
-
Yes
-
Yes
-
Yes
-
Yes
22
22
24
24
28
28
28
28
-1-
Publication Release Date: July 1995
Revision A3
W91590 SERIES
PIN CONFIGURATIONS
C1
C2
C1
C1
C2
C3
C4
C5
C6
C7
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
R5
R4
R3
R2
R1
NC
V
DD
MODE
DTMF
DP/C9
HKS
C2
C3
C4
C5
C6
C7
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
R5
R4
R3
R2
R1
NC
V
DD
MODE
DTMF
DP/C9
HKS
HFO
C3
C4
C5
C6
C7
C8
KT
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R5
R4
R3
R2
R1
HPM MUTE
NC
DRS
V
DD
MODE
DTMF
DP/C9
HKS
HFO
W91590
W91590A
W91590B/C
C1
C2
C1
C1
C2
C3
C4
C5
C6
C7
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
R5
R4
R3
R2
R1
LOCK
V
DD
MODE
DTMF
DP/C9
HKS
C2
C3
C4
C5
C6
C7
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
R5
R4
R3
R2
R1
LOCK
V
DD
MODE
DTMF
DP/C9
HKS
HFO
C3
C4
C5
C6
C7
C8
KT
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R5
R4
R3
R2
R1
HPM MUTE
LOCK
DRS
V
DD
MODE
DTMF
DP/C9
HKS
HFO
W91590L
W91590AL
W91590BL/CL
-2-
W91590 SERIES
PIN DESCRIPTION
SYMBOL
Column-
Row
Inputs
22-PIN
1−7
&
18−22
24-PIN
1−7
&
20−24
28-PIN
1−8
&
24−28
I/O
FUNCTION
I The keyboard input may be from either the
standard 9
×
5 keyboard or an inexpensive
single contact (form A) keyboard. Electronic
input from a
µC
can also be used.
A valid key entry is defined by a single row
being connected to a single column.
I, O A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal or
ceramic resonator.
O The T/P MUTE is a conventional CMOS
N-channel open drain output.
The output transistor is switched on during
pulse and tone mode dialing sequence and
flash break. Otherwise, it is switched off.
O The HPM MUTE is a conventional inverter
output. During pulse dialing, flash, hold, and
mercury mute functions, this pin will output
an active high. It remains in a low state at all
other times.
I Pulling mode pin to V
SS
places the dialer in
tone mode.
Pulling mode pin to V
DD
places the dialer in
pulse mode (M/B = 2:3).
Leaving mode pin floating places the dialer
in pulse mode (M/B = 1:2).
I Hook switch input.
HKS = 1: On-hook state. Chip in sleeping
mode, no operation.
HKS = 0: Off-hook state. Chip enabled for
normal operation.
HKS pin is pulled to V
DD
by internal resistor.
O N-channel open drain dialing pulse output
(Figure 1).
Flash key causes DP to go active when in
pulse mode and tone mode.
- No connection.
XT, XT
9, 10
9, 10
11, 12
T/P
MUTE
11
11
13
HPM
MUTE
-
-
23
MODE
15
17
19
HKS
12
14
16
DP /C9
13
15
17
NC
17
19
22
(W91590) (W91590A) (W91590B/C)
-3-
Publication Release Date: July 1995
Revision A3
W91590 SERIES
Pin Description, continued
SYMBOL
LOCK
22-PIN
24-PIN
28-PIN
I/O
FUNCTION
17
19
22
I The function of this pin is as follows:
(For
(For
(For
FUNCTION
LOCK PIN
W91590L) W91590AL) W91590BL/CL)
V
DD
Floating
V
SS
"0","9" dialing inhibited
Normal dialing
"0" dialing inhibited
DTMF
14
16
18
O In pulse mode, remains in low state at all
times. In tone mode, outputs a dual or single
tone. Detailed timing diagram for tone mode
is shown in Figure 2.
OUTPUT FREQUENCY
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error%
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
V
DD,
V
SS
HFI, HFO
16, 8
-
18, 8
12, 13
20, 10
14, 15
I Power input pins.
I, O Handfree control pins. A low pulse on the
HFI input pin toggles the handfree control
state. Status of the handfree control state is
listed in the following table:
CURRENT STATE
Hook SW.
HFO
Low
High
High
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
NEXT STATE
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
-
On Hook
Off Hook
On Hook
Off Hook
Off Hook
-
Low
High
KT
-
-
9
HFI pin is pulled to V
DD
by internal resistor.
The detailed timing is shown in Fig 3.
O Key tone signal output. A key tone will be
generated whenever a valid keys is pressed.
Frequency is 600 Hz and duration is 35 mS.
-4-
W91590 SERIES
Pin Description, continued
SYMBOL
DRS
22-PIN
-
24-PIN
-
28-PIN
21
I/O
FUNCTION
I Dial rate selection.
This pin is pulled to V
DD
by an internal
resistor.
DRS
MODE
PIN
TONE/PULSE
DIAL
RATE
M/B
1
V
DD
Floating
V
SS
V
DD
Pulse
Pulse
Tone
Pulse
Pulse
Tone
10 ppS 2:3
10 ppS 1:2
10 ppS 1:2
20 ppS 1:2
2
Floating
V
SS
BLOCK DIAGRAM
XT
HKS
LOCK
MODE
XT
SYSTEM CLOCK
GENERATOR
HFI
DRS
KT
KEYBOARD
INTERFACE
RAM
READ/WRITE
COUNTER
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
T/P MUTE
HPM MUTE
HFO
DP/C9
ROW
(R1 to R5)
COLUNM
(C1 to C8)
LOCATION
LATCH
DTMF
D/A CONVERTER
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
-5-
Publication Release Date: July 1995
Revision A3
