W9864G2GH
512K X 4 BANKS X 32BITS SDRAM
Table of Contents-
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES ................................................................................................................................. 3
AVAILABLE PART NUMBER...................................................................................................... 4
PIN CONFIGURATION ............................................................................................................... 5
PIN DESCRIPTION..................................................................................................................... 6
BLOCK DIAGRAM ...................................................................................................................... 7
FUNCTIONAL DESCRIPTION.................................................................................................... 8
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
8.
9.
8.1
9.1
Power Up and Initialization ............................................................................................. 8
Programming Mode Register.......................................................................................... 8
Bank Activate Command ................................................................................................ 8
Read and Write Access Modes ...................................................................................... 8
Burst Read Command .................................................................................................... 9
Burst Command .............................................................................................................. 9
Read Interrupted by a Read ........................................................................................... 9
Read Interrupted by a Write............................................................................................ 9
Write Interrupted by a Write............................................................................................ 9
Write Interrupted by a Read............................................................................................ 9
Burst Stop Command ................................................................................................... 10
Addressing Sequence of Sequential Mode .................................................................. 10
Addressing Sequence of Interleave Mode.................................................................... 10
Auto-precharge Command ........................................................................................... 11
Precharge Command.................................................................................................... 11
Self Refresh Command ................................................................................................ 11
Power Down Mode ....................................................................................................... 12
No Operation Command............................................................................................... 12
Deselect Command ...................................................................................................... 12
Clock Suspend Mode.................................................................................................... 12
Simplified Stated Diagram ............................................................................................ 14
Absolute Maximum Ratings .......................................................................................... 15
OPERATION MODE ................................................................................................................. 13
ELECTRICAL CHARACTERISTICS......................................................................................... 15
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Publication Release Date:Aug. 13, 2007
Revision A09
W9864G2GH
9.2
9.3
9.4
9.5
10.
10.1
10.2
10.3
10.4
10.5
11.
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
11.12
11.13
11.14
11.15
11.16
11.17
11.18
11.19
11.20
11.21
11.22
12.
13.
12.1
Recommended DC Operating Conditions .................................................................... 15
Capacitance .................................................................................................................. 16
DC Characteristics ........................................................................................................ 16
AC Characteristics and Operating Condition................................................................ 17
Command Input Timing ................................................................................................ 20
Read Timing.................................................................................................................. 21
Control Timing of Input Data......................................................................................... 22
Control Timing of Output Data ...................................................................................... 23
Mode Register Set Cycle .............................................................................................. 24
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)...................................... 25
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge)........... 26
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)...................................... 27
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge)........... 28
Interleaved Bank Write (Burst Length = 8) ................................................................... 29
Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 30
Page Mode Read (Burst Length = 4, CAS Latency = 3)............................................... 31
Page Mode Read/Write (Burst Length = 8, CAS Latency = 3) ..................................... 32
Auto-precharge Read (Burst Length = 4, CAS Latency = 3) ........................................ 33
Auto-precharge Write (Burst Length = 4) .................................................................... 34
Auto Refresh Cycle ..................................................................................................... 35
Self Refresh Cycle....................................................................................................... 36
Bust Read and Single Write (Burst Length = 4, CAS Latency = 3)............................. 37
Power Down Mode ...................................................................................................... 38
Auto-precharge Timing (Write Cycle).......................................................................... 39
Auto-precharge Timing (Read Cycle).......................................................................... 40
Timing Chart of Read to Write Cycle........................................................................... 41
Timing Chart of Write to Read Cycle........................................................................... 41
Timing Chart of Burst Stop Cycle (Burst Stop Command).......................................... 42
Timing Chart of Burst Stop Cycle (Precharge Command) .......................................... 42
CKE/DQM Input Timing (Write Cycle) ......................................................................... 43
CKE/DQM Input Timing (Read Cycle)......................................................................... 44
86L TSOP (II)-400 mil................................................................................................... 45
TIMING WAVEFORMS ............................................................................................................. 20
OPERATING TIMING EXAMPLE ............................................................................................. 25
PACKAGE SPECIFICATION .................................................................................................... 45
REVISION HISTORY ................................................................................................................ 46
Publication Release Date:Aug. 13, 2007
Revision A09
-2-
W9864G2GH
512K X 4 BANKS X 32BITS SDRAM
1. GENERAL DESCRIPTION
W9864G2GH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
512K words
×
4 banks
×
32 bits. Using pipelined architecture and 0.11 µm process technology,
W9864G2GH delivers a data bandwidth of up to 800M bytes per second. For different application,
W9864G2GH is sorted into the following speed grades:-5,-6/-6C/-6I,-7.The -5 parts can run up to
200MHz/CL3.The -6/-6C/-6I parts can run up to 166 MHz/CL3. And the grade of –6C with t
CK
=7.5nS
on CL=2, t
IH
=0.8nS on CL=2/3.And the -6I grade which is guaranteed to support -40°C ~ 85°C.The -7
parts can run up to 143 MHz/CL3.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9864G2GH is ideal for main memory in
high performance applications.
2. FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
3.3V± 0.3V for -5/-6/-6C/-6I grade power supply
2.7V
½
3.6V for -7 grade power supply
524,288 words
×
4 banks
×
32 bits organization
Self Refresh Current: Standard and Low Power
CAS Latency: 2 & 3
Burst Length: 1, 2, 4, 8 and full page
Sequential and Interleave Burst
Byte data controlled by DQM0-3
Auto-precharge and controlled precharge
Burst read, single write operation
4K refresh cycles/64 mS
Interface: LVTTL
Packaged in TSOP II 86-pin, 400 mil
W9864G2GH is using Lead free materials
-3-
Publication Release Date:Aug. 13, 2007
Revision A09
W9864G2GH
3. AVAILABLE PART NUMBER
PART NUMBER
SPEED (CL=3)
SELF REFRESH
CURRENT (MAX.)
OPERATING
TEMPERATURE
W9864G2GH-5
W9864G2GH-6/-6C
W9864G2GH-6I
W9864G2GH-7
200 MHz
166 MHz
166 MHz
143 MHz
2mA
2mA
2mA
2mA
0°C ~ 70°C
0°C ~ 70°C
-40°C ~ 85°C
0°C ~ 70°C
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Publication Release Date:Aug. 13, 2007
Revision A09
W9864G2GH
4. PIN CONFIGURATION
VCC
DQ0
V
CC
Q
DQ1
DQ2
V
SS
Q
DQ3
DQ4
V
CC
Q
DQ5
DQ6
VSSQ
DQ7
NC
VCC
DQM0
WE
CAS
RAS
CS
NC
BS0
BS1
A10/AP
A0
A1
A2
DQM2
V
CC
NC
DQ16
V
SS
Q
DQ17
DQ18
V
CC
Q
DQ19
DQ20
V
SS
Q
DQ21
DQ22
V
CC
Q
DQ23
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
V
ss
DQ15
V
SS
Q
DQ14
DQ13
V
CC
Q
DQ12
DQ11
V
SS
Q
DQ10
DQ9
V
CC
Q
DQ8
NC
V
SS
DQM1
NC
NC
CLK
CKE
A9
A8
A7
A6
A5
A4
A3
DQM3
V
SS
NC
DQ31
V
CC
Q
DQ30
DQ29
V
SS
Q
DQ28
DQ27
V
CC
Q
DQ26
DQ25
V
SS
Q
DQ24
V
SS
-5-
Publication Release Date:Aug. 13, 2007
Revision A09
