WED8L24257V
Asynchronous SRAM, 3.3V, 256Kx24
FEATURES
256Kx24 bit CMOS Static
Random Access Memory Array
• Fast Access Times: 10, 12, and 15ns
• Master Output Enable and Write Control
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
Surface Mount Package
• 119 Lead BGA (JEDEC MO-163), No. 391
• Small Footprint, 14mmx22mm
• Multiple Ground Pins for Maximum Noise Immunity
Single +3.3V (±5%) Supply Operation
DSP Memory Solution
• Motorola DSP5630x
• Analog Devices SHARC
TM
The JEDEC Standard 119 lead BGA provides a 69% space savings
over using six 256Kx4, 300 mil wide SOJs and the BGA package
has a maximum height of 110 mils compared to 148 mils for the SOJ
packages. The BGA package also allows the use of the same
manufacturing and inspection techniques as the Motorola DSP, which
is also in a BGA package.
The single or dual chip memory solutions offer improved system
performance by reducing the length of board traces and the number
of board connections compared to using multiple monolithic devices.
DESCRIPTION
The WED8L24257VxxBC is a 3.3V, twelve megabit SRAM con-
structed with three 256Kx8 die mounted on a multi-layer laminate
substrate. With 10 to 15ns access times, x24 width and a 3.3V
operating voltage, the WED8L24257V is ideal for creating a single chip
memory solution for the Motorola DSP5630x (Figure 8) or a two chip
solution for the Analog Devices SHARC
TM
DSP (Figure 9).
FIG. 1
PIN CONFIGURATION
PIN SYMBOLS
1
2
AO
A5
NC
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
NC
A9
A13
3
A1
A6
NC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
NC
A10
A14
4
A2
E
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
W
G
5
A3
A7
NC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
NC
A11
A15
6
A4
A8
NC
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
A17
A12
A16
7
NC
NC
I/00
I/01
I/02
I/03
I/04
I/05
NC
I/06
I/07
I/08
I/09
I/010
I/011
NC
NC
A
0-17
E
W
G
DQ
0-23
VCC
GND
NC
PIN NAMES
Address Inputs
Chip Enable
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (3.3V
±5%)
Ground
No Connection
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
NC
NC
I/012
I/013
I/014
I/015
I/016
I/017
NC
I/018
I/019
I/020
I/021
I/022
I/023
NC
NC
BLOCK DIAGRAM
A
0
-A
17
G
W
E
18
256K x 24
Memory
Array
DQ
0
-
7
DQ
8-15
DQ
16-23
March 2000 Rev. 1
ECO #12474
1
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
WED8L24257V
ABSOLUTE MAXIMUM RATINGS
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial
Industrial
Storage Temperature
Power Dissipation
Output Current
-0.5V to 4.6V
0°C to + 70°C
-40°C to +85°C
-55°C to +125°C
1.5 Watts
50 mA
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Sym
VCC
VSS
VIH
VIL
Min
3.135
0
2.2
-0.3
Typ
Max Units
3.3
3.465
V
0
0
V
-- VCC+0.3 V
--
0.8
V
*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions greater than those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
FIG. 2
FIG. 3
VCC
Q
Z0
0
= 50Ω
Z = 50Ω
65 pF
D
OUT
353Ω
319Ω
R
L
= 50Ω
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
NOTE: For t
EHQZ
, t
GHQZ
and t
WLQZ
see Figure 3.
5 pF
VSS to 3.0V
5ns
1.5V
Figure 2
V
L
= 1.5V
DC ELECTRICAL CHARACTERISTICS
Parameter
Operating Power Supply Current
Standby (TTL) Supply Current
Full Standby CMOS
Supply Current
Input Leakage Current
Output Leakage Current
Output High Volltage
Output Low Voltage
Sym
ICC1
ICC2
ICC3
Conditions
W = VIL, II/O = 0mA,
Min Cycle
E > VIH, VIN < VIL or
VIN > VIH, f=ØMHz
E > VCC-0.2V
VIN > VCC-0.2V or
VIN < 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH = -4.0mA
IOL = 4.0mA
Min
10ns
500
150
90
Max
12-15ns
480
150
90
mA
mA
mA
Units
ILI
ILO
VOH
VOL
±10
±10
2.4
0.4
±10
±10
0.4
µA
µA
V
V
TRUTH TABLE
G
X
H
L
X
E
H
L
L
L
W
X
H
H
L
Mode
Standby
Output Deselect
Read
Write
Output
High Z
High Z
D
OUT
D
IN
Power
ICC2,ICC3
ICC1
ICC1
ICC1
CAPACITANCE
(f=1.0MHz, VIN=VCC or VSS)
Parameter
Address Lines
Data Lines
Write & Output Enable Lines
Chip Enable Lines
Sym
CA
CD/Q
W, G
EØ-E2
Max
8
10
8
8
Unit
pF
pF
pF
pF
These parameters are sampled, not 100% tested.
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March 2000 Rev. 1
WED8L24257V
AC CHARACTERISTICS READ CYCLE
Symbol
JEDEC
Alt.
t
AVAV
t
AVQV
t
ELQV
t
ELQX
t
EHQZ
t
AVQX
t
GLQV
t
GLQX
t
GHQZ
t
RC
t
AA
t
ACS
t
CLZ
t
CHZ
t
OH
t
OE
t
OLZ
t
OHZ
0
5
3
5
0
6
3
5
3
6
0
7
10ns
Min
Max
10
10
10
3
6
3
7
12ns
Min
Max
12
12
12
3
7
15ns
Min Max
15
15
15
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
NOTE 1: Parameter is guaranteed, but not tested.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
FIG. 4
READ CYCLE 1 - W HIGH, G, E LOW
t
AVAV
A
ADDRESS 1
ADDRESS 2
t
AVQV
Q
t
AVQX
DATA
1
DATA 2
FIG. 5
READ CYCLE 2 - W HIGH
t
AVAV
A
t
AVQV
E
t
ELQV
t
ELQX
G
t
EHQZ
t
GLQV
t
GLQX
Q
t
GHQZ
March 2000 Rev. 1
3
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
WED8L24257V
AC CHARACTERISTICS WRITE CYCLE
Symbol
JEDEC
Alt.
t
AVAV
t
WC
t
ELWH
t
ELEH
t
AVWL
t
AVEL
t
AVWH
t
AVEH
t
WLWH
t
WLEH
t
WHAX
t
EHAX
t
WHDX
t
EHDX
t
WLQZ
t
DVWH
t
DVEH
t
WHQX
t
CW
t
CW
t
AS
t
AS
t
AW
t
AW
t
WP
t
WP
t
WR
t
WR
t
DH
t
DH
t
WHZ
t
DW
t
DW
t
WLZ
10ns
Min
Max
10
8
8
0
0
8
8
8
8
0
0
0
0
0
6
6
3
12ns
Min Max
12
9
9
0
0
9
9
10
10
0
0
0
0
0
6
6
3
15ns
Min
Max
15
9
9
0
0
10
10
11
11
0
0
0
0
0
7
7
3
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
Output Active from End of Write (1)
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
6
7
NOTE 1: Parameter is guaranteed, but not tested.
FIG. 6
WRITE CYCLE 1 - W CONTROLLED
t
AVAV
A
t
AVWH
t
ELWH
E
t
WHAX
t
AVWL
W
t
WLWH
t
DVWH
t
WHDX
D
DATA VALID
t
WLQZ
Q
HIGH Z
t
WHQX
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March 2000 Rev. 1
WED8L24257V
FIG. 7
WRITE CYCLE 2 - E CONTROLLED
t
AVAV
A
t
AVEH
t
ELEH
E
t
EHAX
t
AVEL
W
t
WLEH
t
DVEH
t
EHDX
D
Q
HIGH Z
DATA VALID
ORDERING INFORMATION
Commercial (0°C to +70°C)
Part Number
WED8L24257V10BC
WED8L24257V12BC
WED8L24257V15BC
Speed
(ns)
10
12
15
Package
No.
391
391
391
Industrial (-40°C to +85°C)
Part Number
WED8L24257V12BI
WED8L24257V15BI
Speed
(ns)
12
15
Package
No.
391
391
PACKAGE NO. 391
119 LEAD BGA
JEDEC MO-163
7.62 (0.300)
TYP
A
B
C
D
E
F
G
0.110 MAX
R 1.52 (0.062)
MAX (4x)
A1
CORNER
14.00 (0.551) TYP
1.27 (0.050)
TYP
22.00 (0.866)
TYP
20.32 (0.800)
TYP
H
J
K
L
M
N
P
R
T
U
1.27 (0.050) TYP
0.711 (0.028)
MAX
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
March 2000 Rev. 1
5
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com