首页 > 器件类别 > 无线/射频/通信 > 电信电路

WM8983GEFL/V

Interface - CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver

器件类别:无线/射频/通信    电信电路   

厂商名称:Cirrus Logic(凌云半导体)

厂商官网:http://www.cirrus.com

器件标准:

下载文档
器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Cirrus Logic(凌云半导体)
包装说明
HVQCCN,
Reach Compliance Code
compliant
压伸定律
A/MU-LAW
滤波器
YES
JESD-30 代码
S-PQCC-N32
长度
5 mm
功能数量
1
端子数量
32
工作模式
SYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-25 °C
封装主体材料
PLASTIC/EPOXY
封装代码
HVQCCN
封装形状
SQUARE
封装形式
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度
0.9 mm
标称供电电压
1.8 V
表面贴装
YES
技术
CMOS
电信集成电路类型
PCM CODEC
温度等级
OTHER
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
QUAD
宽度
5 mm
文档预览
WM8983
Mobile Multimedia CODEC with 1W Speaker Driver
DESCRIPTION
The WM8983 is a low power, high quality stereo CODEC
designed for portable multimedia applications. Highly flexible
analogue mixing functions enable new application features,
combining hi-fi quality audio with voice communication.
The device integrates preamps for stereo differential mics,
and includes drivers for speaker, headphone and differential
or stereo line output. External component requirements are
reduced as no separate microphone or headphone amplifiers
are required.
Advanced on-chip digital signal processing includes a 5-band
equaliser, a mixed signal Automatic Level Control for the
microphone or line input through the ADC as well as a purely
digital limiter function for record or playback. A programmable
high pass filter in the ADC path is provided for wind noise
reduction and an IIR with programmable coefficients can be
used as a notch filter to suppress fixed-frequency noise.
The WM8983 digital audio interface can operate in master or
slave mode, while an integrated PLL supports flexible clocking
schemes. A-law and
-law
companding are fully supported.
The WM8983 operates at analogue supply voltages from 2.5V
to 3.3V, although the digital core can operate at voltages
down to 1.71V to save power. Speaker supplies can operate
up to 5V for increased speaker output power. Additional
power management control enables individual sections of the
chip to be powered down under software control.
FEATURES
Stereo CODEC:
DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz)
ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz)
Speaker driver (1W into 8 BTL with 5V supply)
- SNR 90dB
- PSRR 80dB
Headphone driver with ‘capless’ option
- 40mW/channel output power into 16 / 3.3V AVDD2
Pop and click suppression
Mic Preamps:
Stereo Differential or mono microphone Interfaces
Programmable preamp gain
Pseudo differential inputs with common mode rejection
Programmable ALC / Noise Gate in ADC path
Low-noise bias supplied for electret microphones
Other Features:
Enhanced 3-D function for improved stereo separation
Highly flexible mixing functions
5-band equaliser (ADC or DAC path)
ADC Programmable high pass filter (wind noise reduction)
ADC Programmable IIR notch filter
Aux inputs for stereo analog input signals or ‘beep’
PLL supporting various clocks between 8MHz-50MHz
Sample rates supported (kHz): 8, 11.025, 16, 12, 16, 22.05,
24, 32, 44.1, 48
2.5V to 3.6V analogue supplies
1.71V to 3.6V digital supplies
2.5V to 5.5V speaker supplies
5x5mm 32-lead QFN package
APPLICATIONS
Multimedia mobile phones
http://www.cirrus.com
Copyright
Cirrus Logic, Inc., 2005–2016
(All Rights Reserved)
Rev 4.6
AUG ‘16
2
DGND
OUT4 MIXER
BLOCK DIAGRAM
DBVDD
DCVDD
AGND2
OUT4
-1
OUT3 MIXER
AVDD2
AUXR
AUXL
LEFT
OUTPUT
MIXER
+
+
-1
VMID
OUT3
Stereo line or
differential output
NOISY
GND
Gains: -12dB to +35.25dB
LIN
Volume
ADC DIGITAL
FILTERS
Hi-Fi DAC
DIGITAL
FILTERS
LOUT1
LOUT1VOL
Mic
Rbias
LIP
5 Band EQ
Volume
5 Band EQ
3D Enhance
Playback
limiter
3D Enhance
IP BOOST/MIX
L
ADC
LDAC
IP PGA
NOISY
GND
L2/
GPIO2
ALC / Limiter
Wind noise
filter
WM8983
ROUT1VOL
Stereo headphone
output
RIN
RDAC
RIGHT
OUTPUT
MIXER
Gains: -12dB to +35.25dB
ROUT1
Mic
Rbias
RIP
Programmable
IIR notch filter
IP BOOST/MIX
R
ADC
IP PGA
LOUT2
LOUT2VOL
ROUT2VOL
R2/
GPIO3
Stereo or BTL
speaker output
ROUT2
-1
ADCREF,
DACREF
PLL
GPIO1
MICBIAS
I
2
S / PCM AUDIO
INTERFACE
A-law and u-law support
50k
50k
CONTROL
INTERFACE
4k
5k
250k
250k
MODE
MCLK
VMID
ADCDAT
LRC
DACDAT
BCLK
CSB/GPIO1
SDIN
SCLK
AGND1
AVDD1
WM8983
Rev 4.6
WM8983
TABLE OF CONTENTS
DESCRIPTION ................................................................................................................ 1
FEATURES ..................................................................................................................... 1
APPLICATIONS ............................................................................................................. 1
BLOCK DIAGRAM ......................................................................................................... 2
TABLE OF CONTENTS .................................................................................................. 3
PIN CONFIGURATION ................................................................................................... 5
ORDERING INFORMATION ........................................................................................... 5
PIN DESCRIPTION ......................................................................................................... 6
ABSOLUTE MAXIMUM RATINGS ................................................................................. 7
RECOMMENDED OPERATING CONDITIONS .............................................................. 7
ELECTRICAL CHARACTERISTICS .............................................................................. 8
TERMINOLOGY ..................................................................................................................... 14
TYPICAL PERFORMANCE .......................................................................................... 15
SPEAKER OUTPUT THD VERSUS POWER ......................................................................... 15
TYPICAL POWER CONSUMPTION ...................................................................................... 17
AUDIO PATHS OVERVIEW ......................................................................................... 18
SIGNAL TIMING REQUIREMENTS ............................................................................. 19
SYSTEM CLOCK TIMING ...................................................................................................... 19
AUDIO INTERFACE TIMING – MASTER MODE ................................................................... 19
AUDIO INTERFACE TIMING – SLAVE MODE....................................................................... 20
CONTROL INTERFACE TIMING – 3-WIRE MODE................................................................ 21
CONTROL INTERFACE TIMING – 2-WIRE MODE................................................................ 22
INTERNAL POWER ON RESET CIRCUIT ................................................................... 23
RECOMMENDED CONTROL SEQUENCES ............................................................... 25
POWER UP/DOWN SEQUENCE ........................................................................................... 25
LOUT1/ROUT1 ENABLE SEQUENCE ................................................................................... 28
DEVICE DESCRIPTION ............................................................................................... 29
INTRODUCTION .................................................................................................................... 29
INPUT SIGNAL PATH ............................................................................................................ 31
ANALOGUE TO DIGITAL CONVERTER (ADC) ..................................................................... 40
INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) ..................................................... 44
OUTPUT SIGNAL PATH ........................................................................................................ 57
ANALOGUE OUTPUTS ......................................................................................................... 64
DIGITAL AUDIO INTERFACES .............................................................................................. 82
AUDIO SAMPLE RATES ........................................................................................................ 87
MASTER CLOCK AND PHASE LOCKED LOOP (PLL) .......................................................... 87
COMPANDING....................................................................................................................... 90
GENERAL PURPOSE INPUT/OUTPUT ................................................................................. 92
OUTPUT SWITCHING (JACK DETECT) ................................................................................ 93
CONTROL INTERFACE ......................................................................................................... 94
RESETTING THE CHIP ......................................................................................................... 95
POWER SUPPLIES ............................................................................................................... 95
POWER MANAGEMENT ....................................................................................................... 96
REGISTER MAP ........................................................................................................... 97
REGISTER BITS BY ADDRESS ............................................................................................ 99
DIGITAL FILTER CHARACTERISTICS ..................................................................... 118
TERMINOLOGY ................................................................................................................... 118
DAC FILTER RESPONSES ................................................................................................. 119
Rev 4.6
3
WM8983
ADC FILTER RESPONSES ................................................................................................. 119
HIGHPASS FILTER.............................................................................................................. 120
5-BAND EQUALISER ........................................................................................................... 121
APPLICATIONS INFORMATION ............................................................................... 125
RECOMMENDED EXTERNAL COMPONENTS ................................................................... 125
PACKAGE DIAGRAM ................................................................................................ 126
PACKAGE DIAGRAM FOR DEVICES MARKED KF3 / LK8 / RFD....................................... 126
PACKAGE DIAGRAM FOR DEVICES MARKED CT8 .......................................................... 127
IMPORTANT NOTICE ................................................................................................ 128
REVISION HISTORY .................................................................................................. 129
4
Rev 4.6
WM8983
PIN CONFIGURATION
MICBIAS
AGND1
ROUT1
AVDD1
AVDD2
26
LOUT1
32
1
2
3
4
5
6
7
8
9
31
30
29
28
27
LOUT2
25
VMID
LIP
LIN
L2/GPIO2
RIP
RIN
R2/GPIO3
LRC
BCLK
24
23
AGND2
ROUT2
OUT3
OUT4
AUXR
AUXL
MODE
SDIN
WM8983
Top View
22
21
20
19
18
17
10
11
12
13
14
15
16
MCLK
ORDERING INFORMATION
ORDER CODE
WM8983GEFL/V
WM8983GEFL/RV
Note:
Reel quantity = 3,500
TEMPERATURE
RANGE
-25C to +85C
-25C to +85C
PACKAGE
32-lead QFN (5 x 5 mm)
(pb-free)
32-lead QFN (5 x 5 mm)
(pb-free, tape and reel)
MOISTURE
SENSITIVITY LEVEL
MSL3
MSL3
PEAK SOLDERING
TEMPERATURE
260
o
C
260
o
C
Rev 4.6
CSB/GPIO1
DGND
ADCDAT
DACDAT
DCVDD
DBVDD
SCLK
5
查看更多>
参数对比
与WM8983GEFL/V相近的元器件有:CDKWM8983-S-1、CDBWM8983-M-1、WM8983GEFL/RV。描述及对比如下:
型号 WM8983GEFL/V CDKWM8983-S-1 CDBWM8983-M-1 WM8983GEFL/RV
描述 Interface - CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver KIT - WM8983 KIT CDB6160 MB DC EVAL BD - WM8983 MINI EVAL BOARD IC CODEC STER 1W SPKR DVR 32QFN
热门器件
热门资源推荐
器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
需要登录后才可以下载。
登录取消