WS27C010L
Military 128K
x
8 CMOS EPROM
KEY FEATURES
•
High Performance CMOS
— 90 ns Access Time
•
DESC SMD No. 5962-89614
•
Compatible with JEDEC 27010 and
27C010 EPROMs
•
Fast Programming
•
EPI Processing
— Latch-Up Immunity to 200 mA
— ESD Protection Exceeds 2000 Volts
•
JEDEC Standard Pin Configuration
— 32 Pin CERDIP Package
— 32 Pin Leadless Chip Carrier (CLLCC)
GENERAL DESCRIPTION
The WS27C010L is a performance oriented 1 Meg UV Erasable Electrically Programmable Read Only Memory
organized as 128K words x 8 bits/word. It is manufactured using an advanced CMOS technology which enables it to
operate at data access times as fast as 120 nsecs. The memory was designed utilizing WSI's patented self-aligned
split gate EPROM cell, resulting in a low power device with a very cost effective die size.
The WS27C010L 1 Meg EPROM provides extensive code store capacity for microprocessor, DSP, and
microcontroller-based systems. Its 120 nsec access time over the full Military temperature range provides the
potential of no-wait state operation. And where this parameter is important, the WS27C010L provides the user with
a very fast 35 nsec T
OE
output enable time.
The WS27C010L is offered in both a 32 pin 600 mil CERDIP, and a 32 pad Ceramic Leadless Chip Carrier
(CLLCC) for surface mount applications. Its standard JEDEC EPROM pinouts provide for automatic upgrade
density paths for existing 128K and 256K EPROM users.
PIN CONFIGURATION
TOP VIEW
Chip Carrier
A
12
A
15
A
16
V
PP
V
CC
PGM
NC
V
PP
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
CERDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
PGM
NC
A14
A13
A8
A9
A11
OE
A10
CE
O
7
O
6
O
5
O
4
O
3
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
4 3 2
32 31 30
1
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
O
1
O
2
GND
A
14
A
13
A
8
A
9
A
11
OE
A
10
CE
O
7
O
3
O
4
O
5
O
6
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
Chip Select Time (Max)
Output Enable Time (Max)
27C010L-90
90 ns
90 ns
35 ns
27C010L-12
120 ns
120 ns
35 ns
27C010L-15
150 ns
150 ns
40 ns
27C010L-17
170 ns
170 ns
40 ns
27C010L-20
200 ns
200 ns
40 ns
Return to Main Menu
4-25
WS27C010L
ABSOLUTE MAXIMUM RATINGS*
Storage Temperature............................–65° to + 150°C
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7V
V
PP
with Respect to Ground...................–0.6V to + 14V
V
CC
Supply Voltage with
Respect to Ground ....................................–0.6V to +7V
ESD Protection ..................................................
>
2000V
*
NOTICE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
OPERATING RANGE
RANGE
Military
TEMPERATURE
–55°C to +125°C
V
CC
+5V ± 10%
DC READ CHARACTERISTICS
Over Operating Range. (See Above)
SYMBOL
V
IL
V
IH
V
OL
V
OH
I
SB1
I
SB2
I
CC
I
PP
V
PP
I
LI
I
LO
PARAMETER
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2.1 mA
I
OH
= –400 µA
CE = V
IH
CE = OE = V
IL
(Note 1)
V
PP
= V
CC
V
CC
–0.4
V
IN
= 5.5 V or Gnd
V
OUT
= 5.5 V or Gnd
–10
–10
F = 5 MHz
F = 8 MHz
3.5
100
1
50
60
100
V
CC
10
10
TEST CONDITIONS
MIN
–0.5
2.0
MAX
0.8
V
CC
+ 1
0.4
UNITS
V
V
V
V
µA
mA
mA
mA
µA
V
µA
µA
V
CC
Standby Current (CMOS) CE = V
CC
± 0.3 V (Note 2)
V
CC
Standby Current
V
CC
Active Current (TTL)
V
PP
Supply Current
V
PP
Read Voltage
Input Leakage Current
Output Leakage Current
NOTES:
1. The supply current is the sum of I
CC
and I
PP
. The maximum current value is with Outputs O
0
to O
7
unloaded.
2. CMOS inputs: V
IL
= GND ± 0.3V, V
IH
= V
CC
± 0.3 V.
AC READ CHARACTERISTICS
Over Operating Range with V
PP
= V
CC
.
SYMBOL
t
ACC
t
CE
t
OE
t
DF
PARAMETER
Address to Output Delay
CE to Output Delay
OE to Output Delay
Output Disable to
Output Float (Note 3)
Output Hold from
Addresses, CE or OE,
Whichever Occurred
First (Note 3)
0
-90
MIN
MAX
MIN
-12
MAX
MIN
-15
MAX
MIN
-17
MAX
MIN
-20
MAX
UNITS
90
90
35
35
120
120
35
35
150
150
40
40
170
170
40
40
200
200
40
40
ns
t
OH
0
0
0
0
NOTE:
3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing
diagram.
4-26
WS27C010L
AC READ TIMING DIAGRAM
V
IH
ADDRESSES
V
IL
ADDRESS VALID
V
IH
CE
V
IL
t
CE
V
IH
OE
V
IL
t
ACC
V
IH
OUTPUT
V
IL
HIGH Z
t
DF
t
OE
(4)
t
OH
VALID OUTPUT
HIGH Z
(5)
(4)
NOTE:
4. OE may be delayed up to t
CE
– t
OE
after the falling edge of CE without impact on t
CE
.
CAPACITANCE
(5)
T
A
= 25°C, f = 1 MHz
SYMBOL
C
IN
C
OUT
C
VPP
PARAMETER
Input Capacitance
Output Capacitance
V
PP
Capacitance
CONDITIONS
V
IN
= 0V
V
OUT
= 0V
V
PP
= 0 V
TYP
(6)
4
8
18
MAX
6
12
25
UNITS
pF
pF
pF
NOTES:
5. This parameter is only sampled and is not 100% tested.
6. Typical values are for T
A
= 25°C and nominal supply voltages.
TEST LOAD
(High Impedance Test Systems)
A.C. TESTING INPUT/OUTPUT WAVEFORM
820
Ω
2.01 V
D.U.T.
2.4
2.0
0.8
TEST
POINTS
2.0
0.8
100 pF
(INCLUDING SCOPE
AND JIG
CAPACITANCE)
0.4
A.C. testing inputs are driven at 2.4 V for a logic "1" and 0.4 V
for a logic "0." Timing measurements are made at 2.0 V for a
logic "1" and 0.8 V for a logic "0".
NOTE:
7. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.
A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between V
CC
and ground is recommended.
Inadequate decoupling may result in access time degradation or other transient performance failures.
4-27
WS27C010L
PROGRAMMING INFORMATION
DC CHARACTERISTICS
(T
A
= 25 ± 5°C, V
CC
= 6.25 ± 0.25 V, V
PP
= 12.75 ± 0.25 V. See Notes 8, 9 and 10)
SYMBOLS
I
LI
I
PP
I
CC
V
IL
V
IH
V
OL
V
OH
PARAMETER
Input Leakage Current (V
IN
= V
CC
or Gnd)
V
PP
Supply Current During
Programming Pulse (CE = PGM = V
IL
)
V
CC
Supply Current
Input Low Voltage
Input High Voltage
Output Low Voltage During Verify (I
OL
= 2.1 mA)
Output High Voltage During Verify (I
OH
= –400 µA)
3.5
–0.1
2.0
MIN
–10
MAX
10
60
50
0.8
V
CC
+ 0.3
0.4
UNITS
µA
mA
mA
V
V
V
V
NOTES:
8. V
CC
must be applied either coincidentally or before V
PP
and removed either coincidentally or after V
PP
.
9. V
PP
must not be greater than 14 volts including overshoot. During CE = PGM = V
IL
, V
PP
must not be switched from 5 volts
to 12.75 volts or vice-versa.
10. During power up the PGM pin must be brought high (≥ V
IH
) either coincident with or before power is applied to V
PP
.
AC CHARACTERISTICS
(T
A
= 25 ± 5°C, V
CC
= 6.25 ± 0.25 V, V
PP
= 12.75 ± 0.25 V)
SYMBOLS
t
AS
t
OES
t
OS
t
AH
t
OH
t
DF
t
OE
t
VS
/t
CES
t
PW
PARAMETER
Address Setup Time
Output Enable Setup Time
Data Setup Time
Address Hold Time
Data Hold Time
Chip Disable to Output Float Delay
Data Valid From Output Enable
V
PP
Setup Time/CE Setup Time
PGM Pulse Width
2
0.1
3
4
MIN
2
2
2
0
2
0
55
55
TYP
MAX
UNITS
µs
µs
µs
µs
µs
ns
ns
µs
ms
PROGRAMMING WAVEFORM
ADDRESSES
t
AS
DATA
t
OS
V
PP
V
PP
V
CC
V
IH
CE
V
IL
V
IH
PGM
V
IL
t
PW
V
IH
OE
V
IL
t
CES
t
VS
DATA IN STABLE
ADDRESS STABLE
t
AH
HIGH Z
t
OH
t
OE
DATA OUT
VALID
t
DF
t
OES
4-28
WS27C010L
MODE SELECTION
The modes of operation of the WS27C010L are listed below. A single 5 V power supply is required in the read
mode. All inputs are TTL levels except for V
PP
and A
9
for device signature.
MODE
Read
Output Disable
Standby
Programming
Program Verify
Program Inhibit
Signature
Manufacturer
(13)
Device
(13)
PINS
CE
V
IL
X
V
IH
V
IL
V
IL
V
IH
V
IL
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
X
V
IL
V
IL
PGM
X
(11)
X
X
V
IL
V
IH
X
X
X
A
9
X
X
X
X
X
X
V
H(12)
V
H(12)
A
0
X
X
X
X
X
X
V
IL
V
IH
V
PP
X
X
X
V
PP(12)
V
PP(12)
V
PP(12)
X
X
V
CC
5.0 V
5.0 V
5.0 V
6.0 V
6.0 V
5.0 V
5.0 V
5.0 V
OUTPUTS
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
23 H
C1 H
NOTES:
11. X can be V
IL
or V
IH
.
12. V
H
= V
PP
= 12.75 ± 0.25 V.
13. A
1
– A
8
, A
10
– A
16
= V
IL
.
ORDERING INFORMATION
PART NUMBER
WS27C010L-12CMB
*
WS27C010L-12DMB
*
WS27C010L-15CMB
WS27C010L-15DMB
WS27C010L-17CMB
*
WS27C010L-17DMB
*
WS27C010L-20CMB
*
WS27C010L-20DMB
*
SPEED
(ns)
120
120
150
150
170
170
200
200
PACKAGE
TYPE
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
WSI
PACKAGE OPERATING
TEMPERATURE MANUFACTURING
DRAWING
RANGE
PROCEDURE
C2
D4
C2
D4
C2
D4
C2
D4
Military
Military
Military
Military
Military
Military
Military
Military
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
MIL-STD-883C
NOTE:
14. The actual part marking will not include the initials "WS."
*SMD product. See page 4-2 for SMD number.
PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS
REFER TO
PAGE 5-1
The WS27C010L is programmed using Algorithm E shown on page 5-11.
(This product can also be programmed by using National Semiconductor's 27C010 Programming Algorithm.)
Return to Main Menu
4-29
FPGA/CPLD
