A
PPLICATION
N
OTES AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN99 • AN115 • AN124 •AN133 • AN134 • AN135
Dual Supply / Low Power / 1024-tap / SPI bus
Preliminary Information
X9110
Single Digitally-Controlled (XDCP
™
) Potentiometer
FEATURES
• 1024 Resistor Taps – 10-Bit Resolution
• SPI Serial Interface for write, read, and transfer
operations of the potentiometer
• Wiper Resistance, 40
Ω
Typical @ 5V
• Four Non-Volatile Data Registers
• Non-Volatile Storage of Multiple Wiper Positions
• Power On Recall. Loads Saved Wiper Position on
Power Up.
• Standby Current < 3µA Max
• System V
CC
: 2.7V to 5.5V Operation
• Analog V+/V-: -5V to +5V
• 100K
Ω
End to End Resistance
• 100 yr. Data Retention
• Endurance: 100, 000 data changes per bit per
register
• 14-Lead TSSOP, xx-Lead XBGA
• Dual Supply Version of the X9111
• Low Power CMOS
DESCRIPTION
The X9110 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 1023 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
SPI bus interface. The potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and
four non-volatile Data Registers that can be directly
written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor
array though the switches. Powerup recalls the
contents of the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
V
CC
R
H
V+
SPI
Bus
Interface
Address
Data
Status
Bus
Interface &
Control
Write
Read
Transfer
Power On Recall
Wiper Counter
Register (WCR)
Data Registers
(DR0-DR3)
Wiper
100KΩ
1024-taps
POT
Control
V
SS
NC
NC
R
W
R
L
V-
REV 1.1.4 11/13/00
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Characteristics subject to change without notice.
1 of 21
X9110
– Preliminary Information
DETAILED FUNCTIONAL DIAGRAM
V
CC
V+
HOLD
CS
Power On
Recall
DR0
DR1
Wiper
Counter
Register
(WCR)
SCK
SO
SI
R
H
100KΩ
1024-taps
A0
Interface
and
Control
Circuitry
Data
DR2 DR3
R
L
R
W
Control
WP
V
SS
V
-
CIRCUIT LEVEL APPLICATIONS
• Vary the gain of a voltage amplifier
• Provide programmable dc reference voltages for
comparators and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage amplifier
circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency and
Q-factor in filter circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
• Vary the frequency and duty cycle of timer ICs
• Vary the dc biasing of a pin diode attenuator in RF
circuits
• Provide a control variable (I, V, or R) in feedback
circuits
SYSTEM LEVEL APPLICATIONS
• Adjust the contrast in LCD displays
• Control the power level of LED transmitters in
communication systems
• Set and regulate the DC biasing point in an RF
power amplifier in wireless systems
• Control the gain in audio and home entertainment
systems
• Provide the variable DC bias for tuners in RF
wireless systems
• Set the operating points in temperature control
systems
• Control the operating point for sensors in industrial
systems
• Trim offset and gain errors in artificial intelligent
systems
REV 1.1.4 11/13/00
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Characteristics subject to change without notice.
2 of 21
X9110
– Preliminary Information
PIN CONFIGURATION
TSSOP
V+
S0
A0
SCK
WP
SI
VSS
14
1
13
2
3
12
X9110
4
11
5
10
6
9
8
7
V
CC
R
L
R
H
R
W
HOLD
CS
V-
X9110
XBGA
PIN ASSIGNMENTS
Pin
(TSSOP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin
(XBGA)
Symbol
V+
SO
A0
SCK
WP
SI
V
SS
V
-
CS
HOLD
R
W
R
H
R
L
V
CC
Analog Supply Voltage
Serial Data Output
Device Address
Serial Clock
Hardware Write Protect
Serial Data Input
System Ground
Analog Supply Voltage
Chip Select
Function
Device Select. Pause the Serial Bus
Wiper Terminal of the Potentiometer
High Terminal of the Potentiometer
Low Terminal of the Potentiometer
System Supply Voltage
REV 1.1.4 11/13/00
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Characteristics subject to change without notice.
3 of 21
X9110 – Preliminary Information
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out on
the falling edge of the serial clock.
S
ERIAL
I
NPUT
(SI)
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9110.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause the
serial communication with the controller without resetting
the serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH at
all times.
D
EVICE
A
DDRESS
(A0)
The address input is used to set the 8-bit slave
address. A match in the slave address serial data
stream A0 must be made with the address input (A0) in
order to initiate communication with the X9110.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9110 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9110, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Bias Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
)
The V
CC
pin is the system supply voltage. The V
SS
pin
is the system ground.
A
NALOG
S
UPPLY
V
OLTAGES
(V+
AND
V
-
)
These supplies are the analog voltage supplies for the
potentiometer. The V+ supply is tied to the wiper
switches while the V- supply is used to bias the
switches and the internal P+ substrate of the integrated
circuit. Both of these supplies set the voltage limits of
the potentiometer.
PRINCIPLES OF OPERATION
DEVICE DESCRIPTION
Serial Interface
The X9110 supports the SPI interface hardware
conventions. The device is accessed via the SI input
with data clocked-in on the rising SCK. CS must be
LOW and the HOLD and WP pins must be HIGH
during the entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9110 is comprised of a resistor array (Figure 1).
The array contains the equivalent of 1023 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R
H
and R
L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(R
W
) output. Within the individual array only one switch
may be turned on at a time.
Potentiometer Pins
R
H
, R
L
The R
H
and R
L
pins are equivalent to the terminal
connections on a mechanical potentiometer.
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer.
REV 1.1.4 11/13/00
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Characteristics subject to change without notice.
4 of 21
X9110 – Preliminary Information
Figure 1. Detailed Potentiometer Block Diagram
Serial Data Path
From Interface
Circuitry
Register 0
(DR0)
10
Register 1
(DR1)
10
Serial
Bus
Input
C
O
U
N
T
E
R
D
E
C
O
D
E
RH
Parallel
Bus
Input
Wiper
Counter
Register
(WCR)
Register 2
(DR2)
Register 3
(DR3)
If WCR = 000[HEX] then R
W
= R
L
If WCR = 3FF[HEX] then R
W
= R
H
RL
R
W
These switches are controlled by a Wiper Counter
Register (WCR). The 10-bits of the WCR (WCR[9:0])
are decoded to select, and enable, one of 1024
switches.
Wiper Counter Register (WCR)
The X9110 contains a Wiper Counter Register (see
Table 1) for the XDCP potentiometer. The WCR is
equivalent to a serial-in, parallel-out register/counter
with its outputs decoded to select one of 1024 switches
along its resistor array. The contents of the WCR can
be altered in one of three ways: (1) it may be written
directly by the host via the write Wiper Counter
Register instruction (serial load); (2) it may be written
indirectly by transferring the contents of one of four
associated Data Registers via the XFR Data Register;
(3) it is loaded with the contents of its data register zero
(DR0) upon power-up.
The Wiper Counter Register is a volatile register; that
is, its contents are lost when the X9110 is powered-
down. Although the register is automatically loaded
with the value in DR0 upon power-up, this may be
different from the value present at power-down. Power-
up guidelines are recommended to ensure proper
loadings of the DR0 value into the WCR.
REV 1.1.4 11/13/00
Data Registers (DR)
The potentiometer has four 10-bit non-volatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the Wiper Counter Register.
All operations changing data in one of the Data
Registers is a nonvolatile operation and will take a
maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
DR[9:0] is used to store one of the 1024 wiper position
(0 ~1023). Table 2.
Status Register (SR)
This 1-bit status register is used to store the system
status (see Table 3).
WIP: Write In Progress status bit, read only.
– When WIP=1, indicates that high-voltage write cycle
is in progress.
– When WIP=0, indicates that no high-voltage write
cycle is in progress.
Characteristics subject to change without notice.
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