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100329

Low Power Octal ECL/TTL Bidirectional Translator with Register

厂商名称:National Semiconductor(TI )

厂商官网:http://www.ti.com

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100329 Low Power Octal ECL/TTL Bidirectional Translator with Register
September 1999
100329
Low Power Octal ECL/TTL Bidirectional Translator with
Register
General Description
The 100329 is an octal registered bidirectional translator de-
signed to convert TTL logic levels to 100K ECL logic levels
and vice versa. The direction of the translation is determined
by the DIR input. A LOW on the output enable input (OE)
holds the ECL outputs in a cut-off state and the TTL outputs
at a high impedance level. The outputs change synchro-
nously with the rising edge of the clock input (CP) even
though only one output is enabled at the time.
The cut-off state is designed to be more negative than a nor-
mal ECL LOW level. This allows the output emitter-followers
to turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance re-
duces the termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100329 is designed with FAST
®
TTL output buffers, fea-
turing optimal DC drive and capable of quickly charging and
discharging highly capacitive loads. All inputs have 50 kΩ
pull-down resistors.
Features
n
n
n
n
n
n
n
Bidirectional translation
ECL high impedance outputs
Registered outputs
FAST TTL outputs
TRI-STATE
®
outputs
Voltage compensated operating range = −4.2V to −5.7V
Standard Microcircuit Drawing
(SMD) 5962-9206601
Connection Diagrams
24-Pin DIP
24-Pin Quad Cerpack
DS100306-4
DS100306-2
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
FAST
®
is a registered trademark of Fairchild Semiconductor.
© 1999 National Semiconductor Corporation
DS100306
www.national.com
Logic Symbol
Functional Diagram
DS100306-1
Pin Descriptions
Pin Names
E
0
–E
7
T
0
–T
7
OE
CP
DIR
Description
ECL Data I/O
TTL Data I/O
Output Enable Input
Clock Pulse Input
(Active Rising Edge)
Direction Control Input
All pins function at 100K ECL levels except for T
0
–T
7
.
DS100306-5
Note:
DIR and OE use ECL logic levels
www.national.com
2
Detail
DS100306-6
OE
L
L
H
H
H
H
H
H
DIR
L
H
L
L
L
H
H
H
CP
X
X
N
N
ECL
Port
Input
LOW
(Cut-Off)
L
H
X
L
H
NC
TTL
Port
Z
Input
L
H
NC
L
H
X
Notes
1, 3
2, 3
1
1
1, 3
2
2
2, 3
L
N
N
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
N
= LOW-to-HIGH Clock Transition
NC = No Change
Note 1:
ECL input to TTL output mode.
Note 2:
TTL input to ECL output mode.
Note 3:
Retains data present before CP.
3
www.national.com
Absolute Maximum Ratings
(Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature (T
STG
)
−65˚C to +150˚C
Maximum Junction Temperature (T
j
)
Ceramic
+175˚C
V
EE
Pin Potential to
Ground Pin
−7.0V to +0.5V
V
TTL
Pin Potential to
Ground Pin
−0.5V to +6.0V
ECL Input Voltage (DC)
V
EE
to +0.5V
ECL Output Current
(DC Output HIGH)
−50 mA
TTL Input Voltage (Note 6)
−0.5V to +6.0V
TTL Input Current (Note 6)
−30 mA to +5.0 mA
Voltage Applied to Output in HIGH State
TRI-STATE Output
Current Applied to TTL
Output in LOW State (Max)
ESD (Note 5)
−0.5V to +5.5V
Twice the Rated I
OL
(mA)
≥2000V
Recommended Operating
Conditions
Case Temperature (T
C
)
Military
ECL Supply Voltage (V
EE
)
TTL Supply Voltage (V
TTL
)
–55˚C to +125˚C
−5.7V to −4.2V
+4.5V to +5.5V
Note 4:
Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 5:
ESD testing conforms to MIL-STD-883, Method 3015.
Note 6:
Either voltage limit or current limit is sufficient to protect inputs.
Military Version
TTL-to-ECL DC Electrical Characteristics
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND, T
C
= −55˚C to +125˚C, V
TTL
= +4.5V to +5.5V
Symbol
V
OH
Parameter
Output HIGH Voltage
Min
−1025
−1085
V
OL
Output LOW Voltage
−1830
−1830
Cutoff Voltage
Max
−870
−870
−1620
−1555
−1950
−1850
V
OHC
Output HIGH Voltage
−1035
−1085
V
OLC
Output LOW Voltage
−1610
−1555
V
IH
V
IL
I
IH
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Breakdown Test
I
IL
V
FCD
I
EE
Input LOW Current
Input Clamp
Diode Voltage
V
EE
Supply Current
−206
−70
mA
−1.0
−1.2
2.0
0.8
70
1.0
Units
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
V
V
µA
mA
mA
V
T
C
0˚C to
+125˚C
−55˚C
0˚C to
+125˚C
−55˚C
0˚C to
+125˚C
−55˚C
0˚C to
+125˚C
−55˚C
0˚C to
+125˚C
−55˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚ C
−55˚C to
+125˚C
OE and DIR High
Inputs Open
V
EE
= −4.2V to −5.7V
I
IN
= −18 mA
V
IN
= +0.5V
(Notes 7, 8,
9)
(Notes 7, 8,
9)
(Notes 7, 8,
9)
V
IN
= +5.5V
V
IN
= +2.7V
Over V
TTL
, V
EE
, T
C
Range
Over V
TTL
, V
EE
, T
C
Range
(Notes 7, 8,
9, 10)
(Notes 7, 8,
9, 10)
(Notes 7, 8,
9)
V
IN
= V
IH
(Min)
or V
IL
(Max)
Loading with
50Ω0 to −2.0V
(Notes 7, 8,
9)
OE or DIR Low
V
IN
= V
IH
(Max)
or V
IL
(Min)
Conditions
Loading with
50Ω to −2.0V
Notes
(Notes 7, 8,
9)
www.national.com
4
Military Version
ECL-to-TTL DC Electrical Characteristics
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND, T
C
= −55˚C to +125˚C, C
L
= 50 pF, V
TTL
= +4.5V to + 5.5V
Symbol
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZHT
I
OZLT
I
OS
I
TTL
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
TRI-STATE Current
Output High
TRI-STATE Current
Output Low
Output Short-Circuit
CURRENT
V
TTL
Supply Current
70
47
70
mA
mA
mA
−60
−150
mA
−1.0
mA
0.50
70
−1165
Min
2.5
2.4
0.5
−870
mV
mV
mV
µA
µA
µA
Max Units
mV
T
C
0˚C to +125˚C
−55˚C
−55˚C
+125˚C
−55˚C
+125˚C
−1830 −1475
350
500
−55˚C to
+125˚C
0˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
TTL Outputs Low
TTL Output High
TTL Output in TRI-STATE
(Notes 7, 8, 9)
V
OUT
= 0.0V, V
TTL
= +5.5V
(Notes 7, 8, 9)
V
OUT
= +0.5V
(Notes 7, 8, 9)
Guaranteed HIGH Signal
for All Inputs
Guaranteed LOW Signal
for All Inputs
V
EE
= −5.7V
V
IN
= V
IH
(Max)
V
EE
= −4.2V
V
IN
= V
IL
(Min)
V
OUT
= +2.7V
(Notes 7, 8, 9, 10)
(Notes 7, 8, 9)
(Notes 7, 8, 9)
(Notes 7, 8, 9)
(Notes 7, 8, 9, 10)
I
OL
= 24 mA, V
TTL
= 4.50V
I
OH
Conditions
= −1 mA, V
TTL
= 4.50V
Notes
(Notes 7, 8, 9)
Note 7:
F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 8:
Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups, 1, 2 3, 7, and 8.
Note 9:
Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 10:
Guaranteed by applying specified input condition and testing V
OH
/V
OL
.
Military Version
TTL-to-ECL AC Electrical Characteristics
V
EE
= −4.2V to −5.7V, V
TTL
= +4.5V to +5.5V, V
CC
= V
CCA
= GND
Symbol
Parameter
T
C
= −55˚C
Min
t
PLH
t
PHL
t
PZH
t
PHZ
t
PHZ
t
set
t
hold
t
pw
(H)
t
TLH
t
THL
f
MAX
OE to E
n
(Cutoff to HIGH)
OE to E
n
(HIGH to Cutoff)
DIR to E
n
(HIGH to Cutoff)
T
n
to CP
T
n
to CP
Pulse Width CP
Transition Time
20% to 80%, 80% to 20%
CP
250
250
250
MHz
2.5
2.5
2.5
0.4
2.3
2.0
2.0
2.0
0.5
2.1
2.5
2.5
2.5
0.4
2.4
ns
ns
ns
ns
1.6
4.7
1.6
4.3
1.7
4.7
ns
1.5
5.0
1.6
4.5
1.6
5.0
ns
1.0
4.3
1.5
4.4
1.7
9.0
CP to E
n
1.3
Max
3.8
T
C
= 25˚C
Min
1.6
Max
3.7
T
C
=
+125˚C
Min
1.9
Max
4.3
ns
ns
ns
Units
Conditions
Notes
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
(Notes 11,
12, 13)
(Notes 11,
12, 13)
(Note 14)
(Note 14)
(Note 14)
5
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参数对比
与100329相近的元器件有:100329D、100329F。描述及对比如下:
型号 100329 100329D 100329F
描述 Low Power Octal ECL/TTL Bidirectional Translator with Register Low Power Octal ECL/TTL Bidirectional Translator with Register Low Power Octal ECL/TTL Bidirectional Translator with Register
是否Rohs认证 - 不符合 不符合
厂商名称 - National Semiconductor(TI ) National Semiconductor(TI )
包装说明 - DIP, DIP24,.4 QFF, QFL24,.37SQ
Reach Compliance Code - unknown unknown
Is Samacsys - N N
接口集成电路类型 - ECL TO TTL TRANSLATOR ECL TO TTL TRANSLATOR
JESD-30 代码 - R-XDIP-T24 S-XQFP-F24
JESD-609代码 - e0 e0
端子数量 - 24 24
封装主体材料 - CERAMIC CERAMIC
封装代码 - DIP QFF
封装等效代码 - DIP24,.4 QFL24,.37SQ
封装形状 - RECTANGULAR SQUARE
封装形式 - IN-LINE FLATPACK
电源 - 5,-4.5 V 5,-4.5 V
认证状态 - Not Qualified Not Qualified
表面贴装 - NO YES
技术 - ECL100K ECL100K
端子面层 - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 - THROUGH-HOLE FLAT
端子节距 - 2.54 mm 1.27 mm
端子位置 - DUAL QUAD
Base Number Matches - 1 1
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