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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SJ602
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The 2SJ602 is P-channel MOS Field Effect Transistor designed
for solenoid, motor and lamp driver.
ORDERING INFORMATION
PART NUMBER
2SJ602
2SJ602-S
2SJ602-ZJ
2SJ602-Z
PACKAGE
TO-220AB
TO-262
TO-263
TO-220SMD
Note
FEATURES
•
Super low on-state resistance:
R
DS(on)1
= 73 mΩ MAX. (V
GS
=
−10
V, I
D
=
−10
A)
R
DS(on)2
= 107 mΩ MAX. (V
GS
=
−4.0
V, I
D
=
−10
A)
•
Low input capacitance:
C
iss
= 1300 pF TYP. (V
DS
=
−10
V, V
GS
= 0 V)
•
Built-in gate protection diode
Note
TO-220SMD package is produced only in
Japan
(TO-220AB)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC) (T
C
= 25°C)
Drain Current (pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
P
T
T
ch
T
stg
−60
V
V
A
A
W
W
°C
°C
A
mJ
(TO-262)
m
20
m
20
m
50
40
1.5
150
−55
to +150
−20
40
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note2
Note2
I
AS
E
AS
Notes 1.
PW
≤
10
µ
s, Duty cycle
≤
1%
2.
Starting T
ch
= 25°C, V
DD
=
−30
V, R
G
= 25
Ω,
V
GS
=
−20 →
0 V
(TO-263, TO-220SMD)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D14647EJ3V0DS00 (3rd edition)
Date Published July 2002 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
©
2000, 2001
2SJ602
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
=
−48
V
V
GS
=
−10
V
I
D
=
−20
A
I
F
= 20 A, V
GS
= 0 V
I
F
= 20 A, V
GS
= 0 V
di/dt = 100 A /
µ
s
TEST CONDITIONS
V
DS
=
−60
V, V
GS
= 0 V
V
GS
=
MIN.
TYP.
MAX.
−10
UNIT
µ
A
µ
A
V
S
m
20 V, V
DS
= 0 V
−1.5
8
−2.0
16
59
75
1300
240
100
9
12
54
15
26
5
7
1.0
50
110
m
10
−2.5
V
DS
=
−10
V, I
D
=
−1
mA
V
DS
=
−10
V, I
D
=
−10
A
V
GS
=
−10
V, I
D
=
−10
A
V
GS
=
−4.0
V, I
D
=
−10
A
V
DS
=
−10
V
V
GS
= 0 V
f = 1 MHz
V
DD
=
−30
V, I
D
=
−10
A
V
GS
=
−10
V
R
G
= 0
Ω
73
107
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
=
−20 →
0 V
−
I
D
V
DD
BV
DSS
V
DS
50
Ω
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
R
L
PG.
R
G
V
DD
V
DS
(−)
90%
90%
10% 10%
V
GS
(−)
V
GS
Wave Form
0
10%
V
GS
90%
I
AS
V
GS
(−)
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
=
−2
mA
50
Ω
R
L
V
DD
PG.
2
Data Sheet D14647EJ3V0DS
2SJ602
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
60
dT - Percentage of Rated Power - %
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
100
80
60
40
20
0
P
T
- Total Power Dissipation - W
50
40
30
20
10
0
0
20
40
60
80
100
120 140 160
0
20
40
60
80
100 120 140 160
T
ch
- Channel Temperature -
˚C
T
C
- Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
–100
I
D(pulse)
10
0
PW
µ
s
=
10
µ
s
I
D
- Drain Current - A
I
D(DC)
–10
R
D
S(
)
on
m
Li
ite
d
Po
we
rD
iss
DC
1
m
s
10
Lim
ipa
m
s
tio
n
ite
d
–1
–0.1
–0.1
T
C
= 25˚C
Single Pulse
–1
–10
–100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(t)
- Transient Thermal Resistance - ˚C/W
100
R
th(j-A)
= 83.3˚C/W
10
R
th(j-C)
= 3.13˚C/W
1
0.1
Single Pulse
0.01
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D14647EJ3V0DS
3
