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5 V, Rail-to-Rail, High-Output Current,
xDSL Line Drive Amplifier
AD8018
PIN CONFIGURATIONS
8-Lead SOIC
(Thermal Coastline)
AD8018AR
FEATURES
Ideal xDSL Line Drive Amplifier for USB, PCMCIA, or
PCI-Based Customer Premise Equipment (CPE). The
AD8018 provides maximum reach on 5 V supply,
driving 16 dBm of power into a back-terminated,
transformer-coupled 100 while maintaining –82 dBc
of out-of-band SFDR.
Rail-to-Rail Output Voltage and High Output Current
Drive
400 mA Output Current into Differential Load of 10
@ 8 V p-p
Low Single-Tone Distortion
–86 dBc Worst Harmonic, 6 V p-p into Differential 10
@ 100 kHz
Low Noise
4.5 nV/√Hz Voltage Noise Density, 100 kHz
Out-of-Band SFDR = –82 dBc, 144 kHz to 500 kHz,
R
LOAD
= 12.5 , P
LINE
= 13 dBm
Low-Power Operation
3.3 V to 8 V Power Supply Range
Two Logic Bits for Standby and Shutdown
Low Supply Current of 9 mA/Amplifier (Typ)
Current Feedback Amplifiers
High Speed
130 MHz Bandwidth (–3 dB)
300 V/ s Slew Rate
APPLICATIONS
xDSL USB, PCI, PCMCIA Cards
Consumer DSL Modems
Twisted Pair Line Driver
14-Lead TSSOP
AD8018ARU
14
NC
13
V
S
NC 1
8
V
S
OUT1 1
–IN1 2
IN1 3
–V
S
4
OUT1 2
–IN1 3
IN1 4
7 OUT2
6 –IN2
5
IN2
12 OUT2
11 –IN2
10
IN2
–V
S
5
PWDN1 6
NC 7
NC = NO CONNECT
9 PWDN0
8 DGND
PRODUCT DESCRIPTION
The AD8018 is intended for use in single-supply (5 V) xDSL
modems where high-output current and low distortion are
essential to achieve maximum reach. The dual high-speed
amplifiers are capable of driving low distortion signals to within
0.5 V of the power supply rail. Each amplifier can drive 400 mA
of current into 10
Ω
(differential) while maintaining –82 dBc
out-of-band SFDR. The AD8018 is available with flexible standby
and shutdown modes. Two digital logic bits (PWDN1 and
PWDN0) may be used to put the AD8018 into one of three
modes: full power, standby (outputs low impedance), and
shutdown (outputs high impedance).
Fabricated with ADI’s high-speed XFCB (eXtra Fast Comple-
mentary Bipolar) process, the high bandwidth and fast slew rate
of the AD8018 keep distortion to a minimum, while dissipat-
ing a minimum of power. The quiescent current of the AD8018
is a low 9 mA/amplifier. The AD8018 drive capability comes in
compact 8-lead Thermal Coastline SOIC and 14-lead TSSOP
packages. Low-distortion, rail-to-rail output voltage, and high-
current drive in small packages make the AD8018 ideal for use in
low-cost USB, PCMCIA, and PCI Customer Premise Equipment
for ADSL, SDSL, VDSL, and proprietary xDSL systems. Both
models will operate over the temperature range –40°C to +85°C.
5V
0.01 F
100
1nF
10
–30
N = 4.0
–40
V
S
= 5V
–50
SFDR – dBc
V
S
= 3.3V
–60
V
S
= 8V
10k
–70
V
IN
V
REF
0.01 F
10k
750
750
750
10k
R1
3.1
P
OUT
16dBm
R2
3.1
R
L
= 100
LINE-
POWER
13dBm
–80
–90
4
6
8
10
12
P
LINE
– dBm
14
16
18
0.01 F
100
10
1nF
10k
1:4
TRANSFORMER
Figure 1. Out-of-Band SFDR vs. ADSL Upstream Line Power;
V
S
= 5 V, N = 4 Turns, 144 kHz to 500 kHz. See Evaluation
Board Schematics in Figure 11.
Figure 2. Single-Supply Voltage Differential Drive Circuit
for xDSL Applications
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD8018–SPECIFICATIONS
(@ 25 C, V = 5 V, R = 100
S
L
, R
F
= R
G
= 750
Min
40
100
35
80
unless otherwise noted.)
Typ
50
130
40
100
10
80
300
5.5
25
Max
Unit
MHz
MHz
MHz
MHz
MHz
MHz
V/ s
ns
ns
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Conditions
G = 1, V
OUT
< 0.4 V p-p, R
L
= 5
Ω
G = 1, V
OUT
< 0.4 V p-p, R
L
= 100
Ω
G = 2, V
OUT
< 0.4 V p-p, R
L
= 5
Ω
G = 2, V
OUT
< 0.4 V p-p, R
L
= 100
Ω
V
OUT
< 0.4 V p-p, R
L
= 100
Ω
V
OUT
= 4 V p-p, G = +2
Noninverting, V
OUT
= 4 V p-p
Noninverting, V
OUT
= 2 V p-p
0.1%, V
OUT
= 2 V p-p, R
L
= 100
Ω
0.1 dB Bandwidth
Large Signal Bandwidth
Slew Rate
Rise and Fall Time
Settling Time
NOISE/HARMONIC
PERFORMANCE
Distortion,
Second Harmonic
Third Harmonic
MTPR (In-Band)
SFDR (Out-of-Band)
Input Noise Voltage
Input Noise Current
Crosstalk
DC PERFORMANCE
Input Offset Voltage
V
OUT
= 6 V p-p (Differential)
100 kHz, R
L
= 10
Ω
500 kHz, R
L
= 10
Ω
100 kHz, R
L
= 10
Ω
500 kHz, R
L
= 10
Ω
25 kHz to 138 kHz, R
L
= 12.5
Ω,
P
LINE
= +13 dBm
144 kHz to 500 kHz, R
L
= 12.5
Ω,
P
LINE
= +13 dBm
f = 100 kHz
f = 100 kHz (+Inputs)
f = 100 kHz (–Inputs)
f = 1 MHz, G = +2
–89
–61
–86
–74
–94
–63
–89
–77
–70
–82
4.5
1
10
–74
1
5
dBc
dBc
dBc
dBc
dBc
dBc
nV√Hz
pA√Hz
pA√Hz
dB
mV
mV
mV
kΩ
kΩ
M
Ω
pF
A
A
A
A
A
A
A
A
dB
V
pF
Ω
V
V
mA
mA
T
MIN
to T
MAX
Input Offset Voltage Match
Transimpedance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Bias Current (–)
Input Bias Current (–) Match
T
MIN
to T
MAX
Input Bias Current (+)
T
MIN
to T
MAX
Input Bias Current (+) Match
CMRR
Input CM Voltage Range
OUTPUT CHARACTERISTICS
Cap Load
Output Resistance
Output Voltage Swing
Linear Output Current
Short-Circuit Current
POWER SUPPLY
Supply Current/Amp
STBY Supply Current/Amp
SHUTDOWN Supply Current/Amp
Operating Range
+Power Supply Rejection Ratio
–Power Supply Rejection Ratio
T
MIN
to T
MAX
V
IN
2 V to 4 V
51
1.2
0.1
54
1
V
OUT
= 2 V p-p, R
L
= 5
Ω
T
MIN
to T
MAX
+Input
–Input
+Input
T
MIN
to T
MAX
0.1
830
700
0.1
2000
15
17
2.6
10
125
1
0.3
8
14
5.5
8
1.5
2.5
0.5
1
3.8
30% Overshoot
Frequency = 100 kHz, PWDN1, PWDN0 = 1
R
L
= 100
Ω
R
L
= 5
Ω
SFDR < –85 dBc, f = 100 kHz, R
L
= 10
Ω,
Differential
350
1000
0.2
0.16 to 4.87
0.5 to 4.5
400
1000
9
4.5
4.5
0.3
10
11.4
5.1
5.1
0.55
8
PWDN1 = 1, PWDN0 = 1
T
MIN
to T
MAX
PWDN1 = 0, PWDN0 = 1 or
PWDN1 = 1, PWDN0 = 0
PWDN1 = 0, PWDN0 = 0
Single Supply
V
S
= 1 V
T
MIN
to T
MAX
V
S
= 1 V
T
MIN
to T
MAX
3.3
60
56
52
50
66
55
mA
mA
mA
mA
mA
V
dB
dB
dB
dB
–2–
REV. A
AD8018
Parameter
LOGIC INPUTS (PWDN1, 0)
Logic “1” Voltage
Logic “0” Voltage
Logic Input Bias Current
Standby Recovery Time
Specifications subject to change without notice.
Conditions
Min
2.0
Typ
Max
Unit
V
V
A
ns
0.8
R
L
= 10
Ω,
G = +2, I
S
= 90% of Typical
240
500
ABSOLUTE MAXIMUM RATINGS
1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Internal Power Dissipation
2
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 650 mW
TSSOP Package (RU) . . . . . . . . . . . . . . . . . . . . . . 565 mW
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . .
±
V
S
Logic Voltage, PWDN0, 1 . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .
±
1.6 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range RU, R . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for the device on a 4-layer board in free air at 85°C:
8-Lead SOIC Package:
θ
JA
= 100°C/W.
14-Lead TSSOP Package:
θ
JA
= 115°C/W.
The maximum power that can be safely dissipated by the AD8018
is limited by the associated rise in junction temperature. The
maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of the
plastic, approximately 150°C. Temporarily exceeding this limit
may cause a shift in parametric performance due to a change
in the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can result
in device failure.
While the AD8018 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction tempera-
ture (150°C) is not exceeded under all conditions. To ensure
proper operation, it is necessary to observe the maximum power
derating curves.
2.0
T
J
= 150 C
MAXIMUM POWER DISSIPATION – Watts
1.5
8-LEAD SOIC PACKAGE
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
SO-8
SO-8
SO-8
RU-14
RU-14
RU-14
1.0
14-LEAD TSSOP PACKAGE
0.5
Model
AD8018AR
–40°C to +85°C 8-Lead Plastic
SOIC
AD8018AR–REEL
–40°C to +85°C 8-Lead SOIC
AD8018AR–REEL7 –40°C to +85°C 8-Lead SOIC
AD8018ARU
–40°C to +85°C 14-Lead Plastic
TSSOP
AD8018ARU–REEL –40°C to +85°C 14-Lead Plastic
TSSOP
AD8018ARU–REEL7 –40°C to +85°C 14-Lead Plastic
TSSOP
AD8018ARU–EVAL
Evaluation
Board
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70
AMBIENT TEMPERATURE – C
80 90
Figure 3. Plot of Maximum Power Dissipation vs.
Temperature
RU-14
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8018 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
AD8018–Typical Performance Characteristics
1000
V
S
= 2.5V
R
L
= 100
V
NOISE
– nV/
Hz
(RTI)
750
750
100
V
NOISE
I
NOISE
– pA/
Hz
10 F
TANT
V
S
100
10
0.1 F
AD8018
0.1 F
V
SIGNAL
50
–V
S
10 F
TANT
V
OUT
R
LOAD
10
I
NOISE
1
I
NOISE
1
10
0.1
1M
100
1k
10k
FREQUENCY – Hz
100k
TPC 1. Single-Ended Test Circuit
TPC 4. I
NOISE
and V
NOISE
vs. Frequency
150
G=2
V
S
= 2.5V
R
L
= 5
3k
V
S
= 2.5V
2.5k
OUTPUT IMPEDANCE –
100
OUTPUT VOLTAGE – mV
50
2k
(0,0)
1.5k
0
–50
1k
(1,0)
–100
500
(1,1)
–150
0
50
100
150
200
250
300
350
400
450
500
0
0.01
0.1
TIME – ns
1
10
FREQUENCY – MHz
100
1k
TPC 2. Small Signal Step Response
TPC 5. Output Impedance vs. Frequency, for Full Power,
Standby, and Shutdown Modes
3
G=2
V
S
= 2.5V
R
L
= 5
3
2
(+0.1%) 2
OUTPUT VOLTAGE – V
1
1
0
mV
0
V
OUT
– (V
IN
2)
–1
–1
G=2
V
S
= 2.5
V
IN
= 2V p-p
R
L
= 100
0
10
20
30
40
50
60
TIME – ns
70
80
90
100
–2
(–0.1%) –2
–3
0
50
100
150
200
250
300
350
400
450
500
–3
TIME – ns
TPC 3. Large Signal Step Response
TPC 6. 0.1% Settling Time
–4–
REV. A
