5 V Low Power, Slew-Rate Limited
RS-485/RS-422 Transceiver
ADM483
FEATURES
EIA RS-485/RS-422-compliant
Data rates up to 250 kbps
Slew-rate limited for low EMI
100 nA supply current in shutdown mode
Low power consumption (120 µA)
Up to 32 transceivers on one bus
Outputs high-z when disabled or powered off
–7 V to +12 V bus common-mode range
Thermal shutdown and short-circuit protection
Pin-compatible with MAX483
Specified over –40°C to +85°C temperature range
Available in 8-lead SOIC package
FUNCTIONAL BLOCK DIAGRAM
V
CC
ADM483
RO
RE
DE
DI
D
05079-001
R
A
B
GND
Figure 1.
APPLICATIONS
Low power RS-485 applications
EMI sensitive systems
DTE-DCE interfaces
Industrial control
Packet switching
Local area networks
Level translators
GENERAL DESCRIPTION
The ADM483 is a low power differential line transceiver suitable
for half-duplex data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission, and
complies with EIA Standards RS-485 and RS-422.The part
contains a differential line driver and a differential line receiver.
Both share the same differential pins, with either the driver or
the receiver being enabled at any given time.
The device has an input impedance of 12 kΩ, allowing up to
32 transceivers on one bus. Since only one driver should be
enabled at any time, the output of a disabled or powered-down
driver is three-stated to avoid overloading the bus. This high
impedance driver output is maintained over the entire
common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The driver outputs are slew-rate limited to reduce EMI and data
errors caused by reflections from improperly terminated buses.
Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit.
The part is fully specified over the industrial temperature range,
and is available in an 8-lead SOIC package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADM483
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Specifications....................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Test Circuits....................................................................................... 7
Switching Characteristics ................................................................ 8
Typical Performance Characteristics ............................................. 9
Applications..................................................................................... 11
Differential Data Transmission ................................................ 11
Cable and Data Rate................................................................... 11
Thermal Shutdown .................................................................... 12
Receiver Open-Circuit Fail-Safe............................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
10/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADM483
SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Output Voltage, V
OD
Min
Typ
Max
5
2.0
1.5
1.5
∆ |V
OD
| for Complementary Output States
Common-Mode Output Voltage, V
OC
∆ |V
OC
| for Complementary Output States
Output Short-Circuit Current, V
OUT
= High
Output Short-Circuit Current, V
OUT
= Low
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low
CMOS Input Logic Threshold High
CMOS Logic Input Current (DI)
DE Input Resistance to GND
RECEIVER
Differential Input Threshold Voltage, V
TH
Input Hysteresis
Input Resistance (A, B)
Input Current (A, B)
CMOS Logic Input Current (RE)
CMOS Output Voltage Low
CMOS Output Voltage High
Output Short-Circuit Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
5
5
0.2
3
0.2
250
250
0.8
2.0
±2
220
–200
70
12
1
–0.8
±2
0.4
3.5
7
0.1
120
350
95
±2
10
250
650
+200
Unit
V
V
V
V
V
V
V
mA
mA
V
V
µA
kΩ
mV
mV
kΩ
mA
mA
µA
V
V
mA
µA
µA
µA
µA
–7 V < V
CM
< +12 V
V
CM
= 0V
–7 V < V
CM
< +12 V
V
IN
= +12 V
V
IN
= –7 V
I
OUT
= 4 mA
I
OUT
= –4 mA
0 V < V
OUT
< V
CC
0.4 ≤ V
OUT
≤ 2.4 V
DE = 0 V, RE = V
CC
(shutdown)
DE = 0 V, RE = 0 V
DE = V
CC
Test Conditions/Comments
R =
∞,
Figure 3
R = 50 Ω (RS-422), Figure 3
R = 27 Ω (RS-485), Figure 3
V
TST
= –7 V to 12 V, Figure 4
R = 27 Ω or 50 Ω, Figure 3
R = 27 Ω or 50 Ω, Figure 3
R = 27 Ω or 50 Ω, Figure 3
–7 V < V
OUT
< +12 V
–7 V < V
OUT
< +12 V
35
35
Rev. 0 | Page 3 of 16
ADM483
TIMING SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay t
PLH
, t
PHL
Skew t
SKEW
Rise/Fall Time t
R
, t
F
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay t
PLH
, t
PHL
Differential Skew t
SKEW
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
1
Min
250
250
200
125
125
Typ
Max
Unit
kbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
800
100
2000
800
2000
2000
3000
5000
2000
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, Figure 5
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, Figure 5
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, Figure 5
R
L
= 500 Ω, C
L
= 100 pF, Figure 6
R
L
= 500 Ω, C
L
= 15 pF, Figure 6
R
L
= 500 Ω, C
L
= 100 pF, Figure 6
C
L
= 15 pF, Figure 7
C
L
= 15 pF, Figure 7
R
L
= 1 kΩ, C
L
= 15 pF, Figure 8
R
L
= 1 kΩ, C
L
= 15 pF, Figure 8
R
L
= 1 kΩ, C
L
= 15 pF, Figure 8
250
100
20
20
50
330
50
50
5000
3000
1
The device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to enter
shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to have entered shutdown mode.
Rev. 0 | Page 4 of 16
ADM483
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
V
CC
to GND
Digital I/O Voltage (DE, RE, DI, ROUT)
Driver Output/Receiver Input Voltage
Operating Temperature Range
Storage Temperature Range
θ
JA
Thermal Impedance (SOIC)
Lead Temperature
Soldering (10 s)
Vapor Phase (60 s)
Infrared (15 s)
Rating
6V
–0.3 V to V
CC
+ 0.3 V
–9 V to +14 V
–40°C to +85°C
–65°C to +125°C
110°C/W
300°C
215°C
220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16
